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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-11-29 06:38:46 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-11-30 08:15:30 +0000
commit33d0fb8d346512e1b6819fa70cb17212ea014336 (patch)
treef8831b2f4f65e7edefa90520fed54d0778c1dba7 /src/include/cpu
parent3aa17f76044f92dd772cd2833fa8f30031e17f35 (diff)
AGESA,binaryPI: Add compatibility wrapper for romstage entry
This simplifies transition and reviews towards C environment bootblock by allowing single cache_as_ram.S file to be used. Change-Id: I231972982e5ca6d0c08437693edf926b0eaf9ee1 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37352 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include/cpu')
-rw-r--r--src/include/cpu/amd/car.h9
1 files changed, 0 insertions, 9 deletions
diff --git a/src/include/cpu/amd/car.h b/src/include/cpu/amd/car.h
deleted file mode 100644
index f57ea82ad0..0000000000
--- a/src/include/cpu/amd/car.h
+++ /dev/null
@@ -1,9 +0,0 @@
-#ifndef _CPU_AMD_CAR_H
-#define _CPU_AMD_CAR_H
-
-#include <arch/cpu.h>
-
-asmlinkage void romstage_main(unsigned long bist);
-asmlinkage void ap_romstage_main(void);
-
-#endif