diff options
| author | Lee Leahy <leroy.p.leahy@intel.com> | 2017-03-07 15:47:44 -0800 |
|---|---|---|
| committer | Lee Leahy <leroy.p.leahy@intel.com> | 2017-03-13 17:19:45 +0100 |
| commit | 22c28e0f6aa6aa66828e575b552baf8fb23c3b82 (patch) | |
| tree | 7ae5811db8d1a79e4b5ad55eb1b4badccc2e9aa2 /src/include/cpu | |
| parent | 746d4afbedd2ca5c8fff848ac3af66ce27ca9d72 (diff) | |
src/include: Move storage class to beginning of declaration
Fix the following warning detected by checkpatch.pl:
WARNING: storage class should be at the beginning of the declaration
The following storage class attribute is not detected by checkpatch.py:
static cbmem_init_hook_t init_fn_ ## _ptr_ __attribute__((used,
\
section(".rodata.cbmem_init_hooks"))) = init_fn_;
The following lines generates a false positive:
(pound)define STATIC static
src/include/cpu/amd/common/cbtypes.h:60: WARNING: storage class should
be at the beginning of the declaration
typedef asmlinkage void (*smm_handler_t)(void *);
src/include/cpu/x86/smm.h:514: WARNING: storage class should be at the
beginning of the declaration
(pound)define MAYBE_STATIC static
src/include/stddef.h:34: WARNING: storage class should be at the
beginning of the declaration
TEST=Build and run on Galileo Gen2
Change-Id: Ie087d38e6171b549b90e0b831050ac44746a1e14
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/18657
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/include/cpu')
| -rw-r--r-- | src/include/cpu/cpu.h | 2 | ||||
| -rw-r--r-- | src/include/cpu/intel/romstage.h | 2 | ||||
| -rw-r--r-- | src/include/cpu/x86/smm.h | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/src/include/cpu/cpu.h b/src/include/cpu/cpu.h index d5468549d7..a78dd2f425 100644 --- a/src/include/cpu/cpu.h +++ b/src/include/cpu/cpu.h @@ -7,7 +7,7 @@ void cpu_initialize(unsigned int cpu_index); struct bus; void initialize_cpus(struct bus *cpu_bus); -void asmlinkage secondary_cpu_init(unsigned int cpu_index); +asmlinkage void secondary_cpu_init(unsigned int cpu_index); int cpu_phys_address_size(void); #define __cpu_driver __attribute__ ((used, __section__(".rodata.cpu_driver"))) diff --git a/src/include/cpu/intel/romstage.h b/src/include/cpu/intel/romstage.h index 0dd02ce355..3a9e98934b 100644 --- a/src/include/cpu/intel/romstage.h +++ b/src/include/cpu/intel/romstage.h @@ -27,6 +27,6 @@ void *setup_stack_and_mtrrs(void); asmlinkage void *romstage_main(unsigned long bist); /* romstage_after_car() is the C function called after cache-as-ram has * been torn down. It is responsible for loading the ramstage. */ -void asmlinkage romstage_after_car(void); +asmlinkage void romstage_after_car(void); #endif /* _CPU_INTEL_ROMSTAGE_H */ diff --git a/src/include/cpu/x86/smm.h b/src/include/cpu/x86/smm.h index f07cac35cf..48c4c0ba01 100644 --- a/src/include/cpu/x86/smm.h +++ b/src/include/cpu/x86/smm.h @@ -517,7 +517,7 @@ typedef asmlinkage void (*smm_handler_t)(void *); /* SMM Runtime helpers. */ /* Entry point for SMM modules. */ -void asmlinkage smm_handler_start(void *params); +asmlinkage void smm_handler_start(void *params); /* Retrieve SMM save state for a given CPU. WARNING: This does not take into * account CPUs which are configured to not save their state to RAM. */ |