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authorNaresh G Solanki <naresh.solanki@intel.com>2018-04-02 21:36:05 +0530
committerSubrata Banik <subrata.banik@intel.com>2018-04-05 10:17:29 +0000
commitf92fcabba8dbb1510df6cee545b2cba5ac7e047a (patch)
treeb8a22fbec17161477d85c56a46d40644334dd7b1 /src/include/cpu
parent65d2d21a0435fdc993ca6272cf40fabe6aa13b99 (diff)
x86: Add function to modify CR3 register
Register CR3 holds the physical address of paging-structure hierarchy. Add functions to enable read/write of this register. Change-Id: Icfd8f8e32833d2c80cefc8f930d6eedbfeb5e3ee Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com> Reviewed-on: https://review.coreboot.org/25478 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/include/cpu')
-rw-r--r--src/include/cpu/x86/cr.h21
1 files changed, 21 insertions, 0 deletions
diff --git a/src/include/cpu/x86/cr.h b/src/include/cpu/x86/cr.h
index dafa791213..9eb94022f5 100644
--- a/src/include/cpu/x86/cr.h
+++ b/src/include/cpu/x86/cr.h
@@ -59,6 +59,27 @@ static alwaysinline void write_cr0(CRx_TYPE data)
);
}
+static alwaysinline CRx_TYPE read_cr3(void)
+{
+ CRx_TYPE value;
+ __asm__ __volatile__ (
+ "mov %%cr3, %0"
+ : CRx_RET(value)
+ :
+ : COMPILER_BARRIER
+ );
+ return value;
+}
+
+static alwaysinline void write_cr3(CRx_TYPE data)
+{
+ __asm__ __volatile__ (
+ "mov %0, %%cr3"
+ :
+ : CRx_IN(data)
+ : COMPILER_BARRIER
+ );
+}
static alwaysinline CRx_TYPE read_cr4(void)
{
CRx_TYPE value;