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authorRaul E Rangel <rrangel@chromium.org>2022-02-24 16:02:49 -0700
committerFelix Held <felix-coreboot@felixheld.de>2022-03-09 14:26:26 +0000
commitc5160986cf9aa21a5e8b51d0647f18e8c3fc1dc2 (patch)
tree0311b97494e2c2def1cdc88f3f5ab4ae97c3398a /src/include/cpu
parentef44779726960f281d919b17f11ec46922c2be0d (diff)
cpu/x86/smm,lib/cbmem_console: Enable CBMEMC when using DEBUG_SMI
This change will allow the SMI handler to write to the cbmem console buffer. Normally SMIs can only be debugged using some kind of serial port (UART). By storing the SMI logs into cbmem we can debug SMIs using `cbmem -1`. Now that these logs are available to the OS we could also verify there were no errors in the SMI handler. Since SMM can write to all of DRAM, we can't trust any pointers provided by cbmem after the OS has booted. For this reason we store the cbmem console pointer as part of the SMM runtime parameters. The cbmem console is implemented as a circular buffer so it will never write outside of this area. BUG=b:221231786 TEST=Boot non-serial FW with DEBUG_SMI and verified SMI messages are visible when running `cbmem -1`. Perform a suspend/resume cycle and verify new SMI events are written to the cbmem console log. Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: Ia1e310a12ca2f54210ccfaee58807cb808cfff79 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62355 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/include/cpu')
-rw-r--r--src/include/cpu/x86/smm.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/include/cpu/x86/smm.h b/src/include/cpu/x86/smm.h
index 8ea8336a2d..28d95e11a5 100644
--- a/src/include/cpu/x86/smm.h
+++ b/src/include/cpu/x86/smm.h
@@ -61,6 +61,8 @@ struct smm_runtime {
u32 save_state_size;
u32 num_cpus;
u32 gnvs_ptr;
+ u32 cbmemc_size;
+ void *cbmemc;
uintptr_t save_state_top[CONFIG_MAX_CPUS];
} __packed;