diff options
author | Arthur Heymans <arthur@aheymans.xyz> | 2021-10-28 12:35:39 +0200 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2021-11-03 18:36:15 +0000 |
commit | c435038c55e4a5db68df8e070e756d5a76a5b3ef (patch) | |
tree | 7f356aadd71299ccbd75da50858c559809eb9a16 /src/include/cpu | |
parent | b0db82dd247884e9dba01aa979812cf0943b9a93 (diff) |
cpu/amd/mtrr: Remove topmem global variables
The comments are not correct anymore. With AGESA there is no need to
synchronize TOM_MEMx msr's between AP's. It's also not the best place
to do so anyway.
Change-Id: Iecbe1553035680b7c3780338070b852606d74d15
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58693
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/include/cpu')
-rw-r--r-- | src/include/cpu/amd/mtrr.h | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/src/include/cpu/amd/mtrr.h b/src/include/cpu/amd/mtrr.h index 9a943ac64f..6fe1628bc0 100644 --- a/src/include/cpu/amd/mtrr.h +++ b/src/include/cpu/amd/mtrr.h @@ -66,10 +66,16 @@ static __always_inline void wrmsr_amd(unsigned int index, msr_t msr) ); } -/* To distribute topmem MSRs to APs. */ -void setup_bsp_ramtop(void); -uint64_t bsp_topmem(void); -uint64_t bsp_topmem2(void); +static inline uint64_t amd_topmem(void) +{ + return rdmsr(TOP_MEM).lo; +} + +static inline uint64_t amd_topmem2(void) +{ + msr_t msr = rdmsr(TOP_MEM2); + return (uint64_t)msr.hi << 32 | msr.lo; +} #endif #endif /* CPU_AMD_MTRR_H */ |