diff options
| author | Himanshu Sahdev <himanshu.sahdev@intel.com> | 2023-05-31 15:50:21 +0530 |
|---|---|---|
| committer | Felix Singer <service+coreboot-gerrit@felixsinger.de> | 2023-06-02 01:51:09 +0000 |
| commit | 7315b4064ddaaaaafff8c571053590d9fef89908 (patch) | |
| tree | 58a1c70e55120b793b9323ea1328ab2ec077f44e /src/include/cpu | |
| parent | 21e61847c4cf643d79855deba8f58fd45808d571 (diff) | |
include/cpu/x86: Simplify en/dis cache functions
Implementation of enable/disable cache functions aren't complex,
simply drop cr0 variable usage, still maintains good readablity.
Signed-off-by: Himanshu Sahdev <himanshu.sahdev@intel.com>
Change-Id: I81688e8bbb073e1d09ecf63f3f33e1651dbd778e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75552
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/include/cpu')
| -rw-r--r-- | src/include/cpu/x86/cache.h | 10 |
1 files changed, 2 insertions, 8 deletions
diff --git a/src/include/cpu/x86/cache.h b/src/include/cpu/x86/cache.h index d4d9160252..dcc96b6626 100644 --- a/src/include/cpu/x86/cache.h +++ b/src/include/cpu/x86/cache.h @@ -47,10 +47,7 @@ void clflush_region(const uintptr_t start, const size_t size); */ static __always_inline void enable_cache(void) { - CRx_TYPE cr0; - cr0 = read_cr0(); - cr0 &= ~(CR0_CD | CR0_NW); - write_cr0(cr0); + write_cr0(read_cr0() & ~(CR0_CD | CR0_NW)); } /* @@ -66,10 +63,7 @@ static __always_inline bool self_snooping_supported(void) static __always_inline void disable_cache(void) { /* Disable and write back the cache */ - CRx_TYPE cr0; - cr0 = read_cr0(); - cr0 |= CR0_CD; - write_cr0(cr0); + write_cr0(read_cr0() | CR0_CD); if (!self_snooping_supported()) wbinvd(); } |