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authorSaurabh Mishra <mishra.saurabh@intel.com>2024-04-12 19:41:21 +0530
committerMartin L Roth <gaumless@gmail.com>2024-05-12 18:57:39 +0000
commit254a4b9072d94136ff63a4e9ef327fecdce9baf9 (patch)
tree8fc17cf67593ef9a39995d2491df0ee0b9d61618 /src/include/cpu
parent7f2020b7127a1f1a88c75a7bde11b24c9daec5a8 (diff)
soc/intel/lunarlake: Support stepping A0_2
Details: - Add support for new Lunar Lake MCH ID 0x6410 - Add new CPU id 0xb06d1 Reference: Lunar Lake External Design Specification Volume 1 (734362) TEST=Build, boot the system and verfiy MCH-ID prints in bootblock stage. Below prints verified on Lunar Lake RVP board (lnlrvp). [DEBUG] MCH: device id 6410 (rev 02) is LunarLake M Change-Id: I976d7f269485633d835d204afa224736d71baaa8 Signed-off-by: Saurabh Mishra <mishra.saurabh@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81847 Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <ericllai@google.com>
Diffstat (limited to 'src/include/cpu')
-rw-r--r--src/include/cpu/intel/cpu_ids.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/include/cpu/intel/cpu_ids.h b/src/include/cpu/intel/cpu_ids.h
index ddb4e54c1e..1de1d717d5 100644
--- a/src/include/cpu/intel/cpu_ids.h
+++ b/src/include/cpu/intel/cpu_ids.h
@@ -81,5 +81,6 @@
#define CPUID_RAPTORLAKE_J0 0xb06a2
#define CPUID_RAPTORLAKE_Q0 0xb06a3
#define CPUID_LUNARLAKE_A0_1 0xb06d0
+#define CPUID_LUNARLAKE_A0_2 0xb06d1
#endif /* CPU_INTEL_CPU_IDS_H */