diff options
| author | Saurabh Mishra <mishra.saurabh@intel.com> | 2024-04-12 20:46:46 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-05-14 13:11:04 +0000 |
| commit | 1057865a89568f887f353b020a20d54374acdbe8 (patch) | |
| tree | 9d9cfd26deb6ced79bdfa445ff6a2a233e3538af /src/include/cpu | |
| parent | 47e7240ffc6a8f479bedc065376fb59cd040c7c7 (diff) | |
soc/intel: Add Panther Lake PCIE device IDs
Add Panther Lake specific CPU and PCIE device IDs
Reference:
Panther Lake External Design Specification Volume 0.51 (815002)
BUG=b:329787286
TEST=verified on Panther Lake Simics Platform.
Change-Id: I82f47b6077e28a01f34c59b7e7697323b3d5f990
Signed-off-by: Saurabh Mishra <mishra.saurabh@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81849
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Ashish Kumar Mishra <ashish.k.mishra@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include/cpu')
| -rw-r--r-- | src/include/cpu/intel/cpu_ids.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/include/cpu/intel/cpu_ids.h b/src/include/cpu/intel/cpu_ids.h index 1de1d717d5..ae58110e0e 100644 --- a/src/include/cpu/intel/cpu_ids.h +++ b/src/include/cpu/intel/cpu_ids.h @@ -82,5 +82,6 @@ #define CPUID_RAPTORLAKE_Q0 0xb06a3 #define CPUID_LUNARLAKE_A0_1 0xb06d0 #define CPUID_LUNARLAKE_A0_2 0xb06d1 +#define CPUID_PANTHERLAKE_A0 0xc06c0 #endif /* CPU_INTEL_CPU_IDS_H */ |