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authorKyösti Mälkki <kyosti.malkki@gmail.com>2021-05-31 10:38:45 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2021-06-10 17:46:48 +0000
commit0cfa9110b6d004777cca991771d74ed8dcf5c0e4 (patch)
treed174a52293212da73fa5b4fbcdb99959c1ecc46e /src/include/cpu
parent41e6216df394b729e8a696464f574c4d89317930 (diff)
cpu/x86/lapic: Add lapic_update32() helper
Change-Id: I57c5d85d3098f9d59f26f427fe16829e4e769194 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55187 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include/cpu')
-rw-r--r--src/include/cpu/x86/lapic.h19
1 files changed, 19 insertions, 0 deletions
diff --git a/src/include/cpu/x86/lapic.h b/src/include/cpu/x86/lapic.h
index e19458f06c..cf048a883e 100644
--- a/src/include/cpu/x86/lapic.h
+++ b/src/include/cpu/x86/lapic.h
@@ -92,6 +92,25 @@ static __always_inline void lapic_write(unsigned int reg, uint32_t v)
xapic_write(reg, v);
}
+static __always_inline void lapic_update32(unsigned int reg, uint32_t mask, uint32_t or)
+{
+ if (is_x2apic_mode()) {
+ uint32_t index;
+ msr_t msr;
+ index = X2APIC_MSR_BASE_ADDRESS + (uint32_t)(reg >> 4);
+ msr = rdmsr(index);
+ msr.lo &= mask;
+ msr.lo |= or;
+ wrmsr(index, msr);
+ } else {
+ uint32_t value;
+ value = xapic_read(reg);
+ value &= mask;
+ value |= or;
+ xapic_write_atomic(reg, value);
+ }
+}
+
static __always_inline void lapic_wait_icr_idle(void)
{
do { } while (lapic_read(LAPIC_ICR) & LAPIC_ICR_BUSY);