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authorKyösti Mälkki <kyosti.malkki@gmail.com>2023-06-28 06:16:11 +0300
committerShelley Chen <shchen@google.com>2023-07-05 15:59:31 +0000
commitd7542cb338b79e9395e12e79b798a825f1a38f66 (patch)
tree2c042bcfada9069ab571fb44e74ebd656617f52f /src/include/cpu/x86
parent47d61a7c14570e790a4e9795bcf1422be9445a53 (diff)
arch/x86: Ensure LAPIC mode for exception handler
Attempting to use X2APIC MSRs before the call to enable_lapic() is made raises exception and double-faults. Change-Id: Ib97889466af0fbe639bec2be730784acc015b525 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76194 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Diffstat (limited to 'src/include/cpu/x86')
-rw-r--r--src/include/cpu/x86/lapic.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/src/include/cpu/x86/lapic.h b/src/include/cpu/x86/lapic.h
index f7fecf1342..87cf3c77df 100644
--- a/src/include/cpu/x86/lapic.h
+++ b/src/include/cpu/x86/lapic.h
@@ -184,4 +184,16 @@ void enable_lapic_mode(bool try_set_x2apic);
void disable_lapic(void);
void setup_lapic_interrupts(void);
+static inline unsigned int early_lapicid(void)
+{
+ if (!CONFIG(SMP))
+ return 0;
+
+ if (!ENV_RAMSTAGE)
+ return 0;
+
+ enable_lapic();
+ return lapicid();
+}
+
#endif /* CPU_X86_LAPIC_H */