diff options
| author | Lee Leahy <leroy.p.leahy@intel.com> | 2017-03-07 15:00:18 -0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-03-12 15:45:37 +0100 |
| commit | 84d20d0eb3869d7babaeed7cfbe53f9edad48850 (patch) | |
| tree | 6a5d37792281c6c70d17ef925a250535bc236d9f /src/include/cpu/x86 | |
| parent | 91d1e76fd168defce4132d1e308b68a2013a89df (diff) | |
src/include: Remove spaces before tabs
Fix the following warning detected by checkpatch.pl:
WARNING: please, no space before tabs
TEST=Build and run on Galileo Gen2
Change-Id: If60a58021d595289722d1d6064bea37b0b0bc039
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/18652
Tested-by: build bot (Jenkins)
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/include/cpu/x86')
| -rw-r--r-- | src/include/cpu/x86/lapic_def.h | 4 | ||||
| -rw-r--r-- | src/include/cpu/x86/mtrr.h | 8 |
2 files changed, 6 insertions, 6 deletions
diff --git a/src/include/cpu/x86/lapic_def.h b/src/include/cpu/x86/lapic_def.h index ec1ca6e359..9da89ee873 100644 --- a/src/include/cpu/x86/lapic_def.h +++ b/src/include/cpu/x86/lapic_def.h @@ -21,7 +21,7 @@ #define LAPIC_RRR 0x0C0 #define LAPIC_SVR 0x0f0 #define LAPIC_SPIV 0x0f0 -#define LAPIC_SPIV_ENABLE 0x100 +#define LAPIC_SPIV_ENABLE 0x100 #define LAPIC_ESR 0x280 #define LAPIC_ESR_SEND_CS 0x00001 #define LAPIC_ESR_RECV_CS 0x00002 @@ -30,7 +30,7 @@ #define LAPIC_ESR_SENDILL 0x00020 #define LAPIC_ESR_RECVILL 0x00040 #define LAPIC_ESR_ILLREGA 0x00080 -#define LAPIC_ICR 0x300 +#define LAPIC_ICR 0x300 #define LAPIC_DEST_SELF 0x40000 #define LAPIC_DEST_ALLINC 0x80000 #define LAPIC_DEST_ALLBUT 0xC0000 diff --git a/src/include/cpu/x86/mtrr.h b/src/include/cpu/x86/mtrr.h index 539c366c21..ddafc1eec3 100644 --- a/src/include/cpu/x86/mtrr.h +++ b/src/include/cpu/x86/mtrr.h @@ -25,12 +25,12 @@ #define SMRR_PHYS_BASE 0x1f2 #define SMRR_PHYS_MASK 0x1f3 -#define MTRR_PHYS_BASE(reg) (0x200 + 2 * (reg)) -#define MTRR_PHYS_MASK(reg) (MTRR_PHYS_BASE(reg) + 1) +#define MTRR_PHYS_BASE(reg) (0x200 + 2 * (reg)) +#define MTRR_PHYS_MASK(reg) (MTRR_PHYS_BASE(reg) + 1) #define MTRR_PHYS_MASK_VALID (1 << 11) -#define NUM_FIXED_RANGES 88 -#define RANGES_PER_FIXED_MTRR 8 +#define NUM_FIXED_RANGES 88 +#define RANGES_PER_FIXED_MTRR 8 #define MTRR_FIX_64K_00000 0x250 #define MTRR_FIX_16K_80000 0x258 #define MTRR_FIX_16K_A0000 0x259 |