diff options
| author | Gang Chen <gang.c.chen@intel.com> | 2024-06-18 06:39:12 +0800 |
|---|---|---|
| committer | Lean Sheng Tan <sheng.tan@9elements.com> | 2024-11-14 14:29:23 +0000 |
| commit | 3d32f915a9c4d60046574690db966d1f14eebe65 (patch) | |
| tree | 79cb2533cca5fb7fa593bc77ac23b5873268eba2 /src/include/cpu/x86 | |
| parent | 97412d1929e88a929f73a229e40ca85a38168d7e (diff) | |
soc/intel/xeon_sp: Reserve PRMRR
PRMRR (Protected Region Memory Range Region) are not accessible as
normal DRAM regions and needs to be explicitly reserved in memory
map.
Change-Id: I81d17b1376459510f7c0d43ba4b519b1f2bd3e1f
Signed-off-by: Gang Chen <gang.c.chen@intel.com>
Signed-off-by: Shuo Liu <shuo.liu@intel.com>
Signed-off-by: Jincheng Li <jincheng.li@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84314
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/include/cpu/x86')
| -rw-r--r-- | src/include/cpu/x86/mtrr.h | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/src/include/cpu/x86/mtrr.h b/src/include/cpu/x86/mtrr.h index 2d7a8416c1..16efbb6eef 100644 --- a/src/include/cpu/x86/mtrr.h +++ b/src/include/cpu/x86/mtrr.h @@ -8,6 +8,22 @@ #include <arch/cpu.h> #endif +#define MTRR_VERBOSE_LEVEL BIOS_NEVER + +/* MTRRs are at a 4KiB granularity. */ +#define RANGE_SHIFT 12 +#define ADDR_SHIFT_TO_RANGE_SHIFT(x) \ + (((x) > RANGE_SHIFT) ? ((x) - RANGE_SHIFT) : RANGE_SHIFT) +#define PHYS_TO_RANGE_ADDR(x) ((x) >> RANGE_SHIFT) +#define RANGE_TO_PHYS_ADDR(x) (((resource_t)(x)) << RANGE_SHIFT) + +/* Helpful constants. */ +#define RANGE_1MB PHYS_TO_RANGE_ADDR(1ULL << 20) +#define RANGE_4GB (1ULL << (ADDR_SHIFT_TO_RANGE_SHIFT(32))) + +#define MTRR_ALGO_SHIFT (8) +#define MTRR_TAG_MASK ((1 << MTRR_ALGO_SHIFT) - 1) + /* These are the region types */ #define MTRR_TYPE_UNCACHEABLE 0 #define MTRR_TYPE_WRCOMB 1 @@ -129,6 +145,11 @@ int var_mtrr_set(struct var_mtrr_context *ctx, uintptr_t addr, size_t size, int void commit_mtrr_setup(const struct var_mtrr_context *ctx); void postcar_mtrr_setup(void); +static inline uint64_t calculate_var_mtrr_size(uint64_t mask) +{ + return 1 << (__ffs64(mask >> RANGE_SHIFT) + RANGE_SHIFT); +} + #endif /* !defined(__ASSEMBLER__) */ /* Align up/down to next power of 2, suitable for assembler |