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authorArthur Heymans <arthur@aheymans.xyz>2024-02-02 17:37:42 +0100
committerFelix Held <felix-coreboot@felixheld.de>2024-02-28 12:12:59 +0000
commit3cfcffe49c720bd5152d3a26ec744adbc4f12477 (patch)
tree3b454ac7b4c48097bcd4c82dbe70822a2dfe7970 /src/include/cpu/x86
parentf45fcd1cf3ff801816ea5462a0f0f3208a585c3a (diff)
cpu/x86/(sipi|smm): Pass on CR3 from ramstage
To allow for more flexibility like generating page tables at runtime or page tables that are part of the ramstage, add a parameter to sipi_vector.S and smm_stub.S so that APs use the same page tables as the BSP during their initialization. Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Change-Id: I1250ea6f63c65228178ee66e06d988dadfcc2a37 Reviewed-on: https://review.coreboot.org/c/coreboot/+/80335 Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Diffstat (limited to 'src/include/cpu/x86')
-rw-r--r--src/include/cpu/x86/smm.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/include/cpu/x86/smm.h b/src/include/cpu/x86/smm.h
index beb88faeab..a12065b90b 100644
--- a/src/include/cpu/x86/smm.h
+++ b/src/include/cpu/x86/smm.h
@@ -109,6 +109,7 @@ struct smm_stub_params {
u32 stack_size;
u32 stack_top;
u32 c_handler;
+ u32 cr3;
/* The apic_id_to_cpu provides a mapping from APIC id to CPU number.
* The CPU number is indicated by the index into the array by matching
* the default APIC id and value at the index. The stub loader
@@ -165,6 +166,7 @@ struct smm_loader_params {
size_t num_concurrent_save_states;
smm_handler_t handler;
+ uint32_t cr3;
};
/* All of these return 0 on success, < 0 on failure. */