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authorYinghai Lu <yinghailu@gmail.com>2006-04-03 20:38:34 +0000
committerYinghai Lu <yinghailu@gmail.com>2006-04-03 20:38:34 +0000
commit9a791dffeae2097aa0a18f645ce07acfed41b9bc (patch)
tree2d0359536fe3c1a0c313440b6be4ed09397dade9 /src/include/cpu/x86
parentffb7d8a31ae899f611235cd0a7f3579d34cd8cde (diff)
new cache_as_ram support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2232 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/include/cpu/x86')
-rw-r--r--src/include/cpu/x86/mem.h16
1 files changed, 7 insertions, 9 deletions
diff --git a/src/include/cpu/x86/mem.h b/src/include/cpu/x86/mem.h
index 4849ed289a..532fc79e0a 100644
--- a/src/include/cpu/x86/mem.h
+++ b/src/include/cpu/x86/mem.h
@@ -4,15 +4,13 @@
/* Optimized generic x86 assembly for clearing memory */
static inline void clear_memory(void *addr, unsigned long size)
{
- asm volatile(
- "1: \n\t"
- "movl %0, (%1)\n\t"
- "addl $4, %1\n\t"
- "subl $4, %2\n\t"
- "jnz 1b\n\t"
- : /* No outputs */
- : "a" (0), "D" (addr), "c" (size)
- );
+ asm volatile(
+ "cld \n\t"
+ "rep stosl\n\t"
+ : /* No outputs */
+ : "a" (0), "D" (addr), "c" (size>>2)
+ );
+
}
#endif /* CPU_X86_MEM_H */