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authorMyles Watson <mylesgw@gmail.com>2009-11-06 17:02:51 +0000
committerMyles Watson <mylesgw@gmail.com>2009-11-06 17:02:51 +0000
commit1d6d45e3c98e16cbb86915483f771a7bf0e9a633 (patch)
tree38eca17371ca6c9e47b0b403d016eb163327b01b /src/include/cpu/x86
parent637309d65e6448d34cc92d44f92a93324c154e79 (diff)
Split the two usages of __ROMCC__:
__ROMCC__ now means "Don't use prototypes, since romcc doesn't support them." __PRE_RAM__ means "Use simpler versions of functions, and no device tree." There are probably some places where both are tested, but only one is needed. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4921 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/include/cpu/x86')
-rw-r--r--src/include/cpu/x86/cache.h2
-rw-r--r--src/include/cpu/x86/lapic.h4
-rw-r--r--src/include/cpu/x86/msr.h4
-rw-r--r--src/include/cpu/x86/mtrr.h2
-rw-r--r--src/include/cpu/x86/tsc.h2
5 files changed, 7 insertions, 7 deletions
diff --git a/src/include/cpu/x86/cache.h b/src/include/cpu/x86/cache.h
index af7d3d52ef..22bd1e7e47 100644
--- a/src/include/cpu/x86/cache.h
+++ b/src/include/cpu/x86/cache.h
@@ -41,7 +41,7 @@ static inline void disable_cache(void)
wbinvd();
}
-#if !defined( __ROMCC__) && defined (__GNUC__)
+#if !defined( __ROMCC__) && !defined(__PRE_RAM__) && defined (__GNUC__)
void x86_enable_cache(void);
#endif /* !__ROMCC__ */
diff --git a/src/include/cpu/x86/lapic.h b/src/include/cpu/x86/lapic.h
index 9f2191940a..2b77177bbf 100644
--- a/src/include/cpu/x86/lapic.h
+++ b/src/include/cpu/x86/lapic.h
@@ -68,7 +68,7 @@ static inline __attribute__((always_inline)) void stop_this_cpu(void)
}
#endif
-#if ! defined (__ROMCC__)
+#if ! defined (__ROMCC__) && !defined(__PRE_RAM__)
#define xchg(ptr,v) ((__typeof__(*(ptr)))__xchg((unsigned long)(v),(ptr),sizeof(*(ptr))))
@@ -157,6 +157,6 @@ int start_cpu(struct device *cpu);
#endif /* CONFIG_SMP */
-#endif /* !__ROMCC__ */
+#endif /* !__ROMCC__ && !__PRE_RAM__ */
#endif /* CPU_X86_LAPIC_H */
diff --git a/src/include/cpu/x86/msr.h b/src/include/cpu/x86/msr.h
index c4bc55a343..69b4d8e78a 100644
--- a/src/include/cpu/x86/msr.h
+++ b/src/include/cpu/x86/msr.h
@@ -1,7 +1,7 @@
#ifndef CPU_X86_MSR_H
#define CPU_X86_MSR_H
-#if defined( __ROMCC__) && !defined (__GNUC__)
+#if defined( __ROMCC__)
typedef __builtin_msr_t msr_t;
@@ -43,7 +43,7 @@ static inline void wrmsr(unsigned index, msr_t msr)
);
}
-#endif /* ROMCC__ && !__GNUC__ */
+#endif /* __ROMCC__ */
#endif /* CPU_X86_MSR_H */
diff --git a/src/include/cpu/x86/mtrr.h b/src/include/cpu/x86/mtrr.h
index 704a9d4bb1..2243fe3080 100644
--- a/src/include/cpu/x86/mtrr.h
+++ b/src/include/cpu/x86/mtrr.h
@@ -32,7 +32,7 @@
#define MTRRfix4K_F8000_MSR 0x26f
-#if !defined(__ROMCC__) && !defined (ASSEMBLY)
+#if !defined(__ROMCC__) && !defined (ASSEMBLY) && !defined(__PRE_RAM__)
#include <device/device.h>
diff --git a/src/include/cpu/x86/tsc.h b/src/include/cpu/x86/tsc.h
index 455cd239fe..9370adfe00 100644
--- a/src/include/cpu/x86/tsc.h
+++ b/src/include/cpu/x86/tsc.h
@@ -17,7 +17,7 @@ static tsc_t rdtsc(void)
return res;
}
-#ifndef __ROMCC__
+#if !defined( __ROMCC__ ) && !defined (__PRE_RAM__)
static inline unsigned long long rdtscll(void)
{
unsigned long long val;