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authorMartin Roth <martin.roth@se-eng.com>2013-07-09 21:46:01 -0600
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-07-11 22:36:19 +0200
commit0cb07e3476d9408d0935253f9f26c0a8ddc28401 (patch)
treeb449dc02d522ad013ab4b18e10e17e7e95fde235 /src/include/cpu/x86
parentcbe2edefb93ed3ba0a4b08f72a9b208429920675 (diff)
include: Fix spelling
Change-Id: Iadc813bc8208278996b2b1aa20cfb156ec06fac9 Signed-off-by: Martin Roth <martin.roth@se-eng.com> Reviewed-on: http://review.coreboot.org/3755 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/include/cpu/x86')
-rw-r--r--src/include/cpu/x86/mtrr.h4
-rw-r--r--src/include/cpu/x86/smm.h4
2 files changed, 4 insertions, 4 deletions
diff --git a/src/include/cpu/x86/mtrr.h b/src/include/cpu/x86/mtrr.h
index 38c3f7cd0a..017a77eb84 100644
--- a/src/include/cpu/x86/mtrr.h
+++ b/src/include/cpu/x86/mtrr.h
@@ -47,14 +47,14 @@
* x86_setup_fixed_mtrrs_no_enable() then enable_fixed_mtrrs() (equivalent
* of x86_setup_fixed_mtrrs()) then x86_setup_var_mtrrs(). If the callers
* want to call the components of x86_setup_mtrrs() because of other
- * rquirements the ordering should still preserved.
+ * requirements the ordering should still preserved.
* 2. enable_fixed_mtrr() will enable both variable and fixed MTRRs because
* of the nature of the global MTRR enable flag. Therefore, all direct
* or indirect callers of enable_fixed_mtrr() should ensure that the
* variable MTRR MSRs do not contain bad ranges.
* 3. If CONFIG_CACHE_ROM is selected an MTRR is allocated for enabling
* the caching of the ROM. However, it is set to uncacheable (UC). It
- * is the responsiblity of the caller to enable it by calling
+ * is the responsibility of the caller to enable it by calling
* x86_mtrr_enable_rom_caching().
*/
void x86_setup_mtrrs(void);
diff --git a/src/include/cpu/x86/smm.h b/src/include/cpu/x86/smm.h
index df7e3de5a6..cacbff0c7a 100644
--- a/src/include/cpu/x86/smm.h
+++ b/src/include/cpu/x86/smm.h
@@ -423,7 +423,7 @@ struct smm_runtime {
u32 save_state_size;
/* The apic_id_to_cpu provides a mapping from APIC id to cpu number.
* The cpu number is indicated by the index into the array by matching
- * the deafult APIC id and value at the index. The stub loader
+ * the default APIC id and value at the index. The stub loader
* initializes this array with a 1:1 mapping. If the APIC ids are not
* contiguous like the 1:1 mapping it is up to the caller of the stub
* loader to adjust this mapping. */
@@ -446,7 +446,7 @@ void *smm_get_save_state(int cpu);
#else
/* SMM Module Loading API */
-/* Ths smm_loader_params structure provides direction to the SMM loader:
+/* The smm_loader_params structure provides direction to the SMM loader:
* - stack_top - optional external stack provided to loader. It must be at
* least per_cpu_stack_size * num_concurrent_stacks in size.
* - per_cpu_stack_size - stack size per cpu for smm modules.