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authorAaron Durbin <adurbin@chromium.org>2018-04-17 11:37:28 -0600
committerPatrick Georgi <pgeorgi@google.com>2018-04-23 09:18:07 +0000
commitae18f80febc3ecaacc0314e942a4f8b248bfcc4c (patch)
tree0b18a060a00b7ec302e8bcb1fcb0edf166fbad5d /src/include/cpu/x86/pae.h
parent7f5e73463882a92b64dc9f3ffd72a3bc0762300c (diff)
cpu/x86: move NXE and PAT accesses to paging module
The EFER and PAT MSRs are x86 architecturally defined. Therefore, move the macro defintions to msr.h. Add 'paging' prefix to the PAT and NXE pae/paging functions to namespace things a little better. BUG=b:72728953 Change-Id: I1ab2c4ff827e19d5ba4e3b6eaedb3fee6aaef14d Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/25713 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Justin TerAvest <teravest@chromium.org>
Diffstat (limited to 'src/include/cpu/x86/pae.h')
-rw-r--r--src/include/cpu/x86/pae.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/include/cpu/x86/pae.h b/src/include/cpu/x86/pae.h
index eb8fa5a91c..9b9f27b688 100644
--- a/src/include/cpu/x86/pae.h
+++ b/src/include/cpu/x86/pae.h
@@ -1,6 +1,14 @@
#ifndef CPU_X86_PAE_H
#define CPU_X86_PAE_H
+#include <stdint.h>
+
+/* Set/Clear NXE bit in IA32_EFER MSR */
+void paging_set_nxe(int enable);
+
+/* Set PAT MSR */
+void paging_set_pat(uint64_t pat);
+
#define MAPPING_ERROR ((void *)0xffffffffUL)
void *map_2M_page(unsigned long page);