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authorKevin O'Connor <kevin@koconnor.net>2011-01-19 06:32:35 +0000
committerStefan Reinauer <stepan@openbios.org>2011-01-19 06:32:35 +0000
commit5bb9fd6e4dae32f86a07676228034d3828820037 (patch)
tree9933b8327f3af0ce6814d5402ce798a3720d273e /src/include/cpu/x86/mtrr.h
parent4adc9eb60047e7dc3a7921793c489fff4fe3fc57 (diff)
Now that the VIA code is run above 1Meg (like other boards), it should
cache that range instead of the first 1Meg. This reduces boot time by about 1 second on epia-cn. This patch also adds a MTRRphysMaskValid bit definition. Signed-off-by: Kevin O'Connor <kevin@koconnor.net> Acked-by: Stefan Reinauer <stepan@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6272 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/include/cpu/x86/mtrr.h')
-rw-r--r--src/include/cpu/x86/mtrr.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/include/cpu/x86/mtrr.h b/src/include/cpu/x86/mtrr.h
index 164d79af2a..f9aadc58a5 100644
--- a/src/include/cpu/x86/mtrr.h
+++ b/src/include/cpu/x86/mtrr.h
@@ -21,6 +21,8 @@
#define MTRRphysBase_MSR(reg) (0x200 + 2 * (reg))
#define MTRRphysMask_MSR(reg) (0x200 + 2 * (reg) + 1)
+#define MTRRphysMaskValid (1 << 11)
+
#define NUM_FIXED_RANGES 88
#define MTRRfix64K_00000_MSR 0x250
#define MTRRfix16K_80000_MSR 0x258