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author | Benjamin Doron <benjamin.doron@9elements.com> | 2024-02-20 22:46:50 -0500 |
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committer | Arthur Heymans <arthur@aheymans.xyz> | 2024-03-20 06:11:20 +0000 |
commit | bb1f81271b5c8f3c39b64f045857169b08760035 (patch) | |
tree | b13c48e077f873749d96887ad6444961c5b5c8d2 /src/include/cpu/x86/mtrr.h | |
parent | 6b4522e2aa40b6c97929342716ad61e32a694cce (diff) |
cpu/x86/smm: Pass full SMRAM region info to SMM runtime
This data is used by smm_region_overlaps_handler(). Callers use this
helper to determine if it's safe to read/write to memory buffers taken
from untrusted input.
coreboot SMI handlers must not be confused into writing over any SMRAM
subregion, which includes the TSEG_STAGE_CACHE and chipset-specific area
(sometimes, IED), not just the handlers.
If stage cache writes were permitted, this could compromise the
integrity of the S3 resume path.
The consequences to overwriting the chipset-specific area are undefined.
Change-Id: Ibd9ed34fcfd77a4236b5cf122747a6718ce9c91f
Signed-off-by: Benjamin Doron <benjamin.doron@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80703
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/include/cpu/x86/mtrr.h')
0 files changed, 0 insertions, 0 deletions