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authorIgor Bagnucki <igor.bagnucki@3mdeb.com>2020-12-14 14:52:50 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-02-11 13:53:29 +0000
commit252fc29d1afc4c1eb42122ed302a0d25a3331e7c (patch)
treea4f9f1ca0aead8182b52b7ab53ac4fc547c25fc1 /src/include/cpu/power/spr.h
parent3c00c7ec6b1a26699f7aab39c6cb702aa16a3d42 (diff)
src/cpu/power9: add file structure for power9, implement SCOM access
Change-Id: Ib555ce51294c94b22d9a7c0db84d38d7928f7015 Signed-off-by: Igor Bagnucki <igor.bagnucki@3mdeb.com> Signed-off-by: Krystian Hebel <krystian.hebel@3mdeb.com> Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57078 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Diffstat (limited to 'src/include/cpu/power/spr.h')
-rw-r--r--src/include/cpu/power/spr.h70
1 files changed, 70 insertions, 0 deletions
diff --git a/src/include/cpu/power/spr.h b/src/include/cpu/power/spr.h
new file mode 100644
index 0000000000..f22a6cab3d
--- /dev/null
+++ b/src/include/cpu/power/spr.h
@@ -0,0 +1,70 @@
+#ifndef CPU_PPC64_SPR_H
+#define CPU_PPC64_SPR_H
+
+#include <arch/byteorder.h> // PPC_BIT()
+
+#define SPR_TB 0x10C
+
+#define SPR_PVR 0x11F
+#define SPR_PVR_REV_MASK (PPC_BITMASK(52, 55) | PPC_BITMASK(60, 63))
+#define SPR_PVR_REV(maj, min) (PPC_SHIFT((maj), 55) | PPC_SHIFT((min), 63))
+
+#define SPR_HRMOR 0x139
+
+#define SPR_HMER 0x150
+/* Bits in HMER/HMEER */
+#define SPR_HMER_MALFUNCTION_ALERT PPC_BIT(0)
+#define SPR_HMER_PROC_RECV_DONE PPC_BIT(2)
+#define SPR_HMER_PROC_RECV_ERROR_MASKED PPC_BIT(3)
+#define SPR_HMER_TFAC_ERROR PPC_BIT(4)
+#define SPR_HMER_TFMR_PARITY_ERROR PPC_BIT(5)
+#define SPR_HMER_XSCOM_FAIL PPC_BIT(8)
+#define SPR_HMER_XSCOM_DONE PPC_BIT(9)
+#define SPR_HMER_PROC_RECV_AGAIN PPC_BIT(11)
+#define SPR_HMER_WARN_RISE PPC_BIT(14)
+#define SPR_HMER_WARN_FALL PPC_BIT(15)
+#define SPR_HMER_SCOM_FIR_HMI PPC_BIT(16)
+#define SPR_HMER_TRIG_FIR_HMI PPC_BIT(17)
+#define SPR_HMER_HYP_RESOURCE_ERR PPC_BIT(20)
+#define SPR_HMER_XSCOM_STATUS PPC_BITMASK(21, 23)
+#define SPR_HMER_XSCOM_OCCUPIED PPC_BIT(23)
+
+#ifndef __ASSEMBLER__
+#include <types.h>
+
+static inline uint64_t read_spr(int spr)
+{
+ uint64_t val;
+ asm volatile("mfspr %0,%1" : "=r"(val) : "i"(spr) : "memory");
+ return val;
+}
+
+static inline void write_spr(int spr, uint64_t val)
+{
+ asm volatile("mtspr %0, %1" :: "i"(spr), "r"(val) : "memory");
+}
+
+static inline uint64_t read_hmer(void)
+{
+ return read_spr(SPR_HMER);
+}
+
+static inline void clear_hmer(void)
+{
+ write_spr(SPR_HMER, 0);
+}
+
+static inline uint64_t read_msr(void)
+{
+ uint64_t val;
+ asm volatile("mfmsr %0" : "=r"(val) :: "memory");
+ return val;
+}
+
+static inline uint64_t pvr_revision(void)
+{
+ return read_spr(SPR_PVR) & SPR_PVR_REV_MASK;
+}
+
+#endif /* __ASSEMBLER__ */
+#endif /* CPU_PPC64_SPR_H */