diff options
author | Eric Biederman <ebiederm@xmission.com> | 2003-06-17 08:42:17 +0000 |
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committer | Eric Biederman <ebiederm@xmission.com> | 2003-06-17 08:42:17 +0000 |
commit | 8d9c123812492a80a43112c8dd217fcfb3cee2c5 (patch) | |
tree | 0bc841279e289f958d85cc8f2873b42770ecbce1 /src/include/cpu/p6 | |
parent | f96a810f11681ba436b446e9451e02cffcd525f5 (diff) |
- Minor mod to reset16.inc to work with newer binutils hopefully this works with older ones...
- Update apic.h to include the APIC_TASK_PRI register definition
- Update mptable.c to have a reasonable board OEM and productid
- Additional testfiles for romcc.
- Split out auto.c and early failover.c moving their generic bits elsewere
- Enable cache of the rom
- Fixes to amd8111_lpc.c so that we successfully setup virtual wire mode on the ioapic
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@880 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/include/cpu/p6')
-rw-r--r-- | src/include/cpu/p6/apic.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/include/cpu/p6/apic.h b/src/include/cpu/p6/apic.h index b91cdb2a86..65a14603f5 100644 --- a/src/include/cpu/p6/apic.h +++ b/src/include/cpu/p6/apic.h @@ -10,6 +10,8 @@ #define APIC_ID 0x020 #define APIC_LVR 0x030 +#define APIC_TASKPRI 0x80 +#define APIC_TPRI_MASK 0xFF #define APIC_ARBID 0x090 #define APIC_RRR 0x0C0 #define APIC_SVR 0x0f0 |