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authorWisley Chen <wisley.chen@quanta.corp-partner.google.com>2021-08-11 10:55:08 +0600
committerFelix Held <felix-coreboot@felixheld.de>2021-08-27 02:50:31 +0000
commit3412d28b454202a945cbac140677a29753cfcc5b (patch)
tree7f161c7f2b535dc4d62a477cadce14a32fabe06e /src/include/cpu/intel
parentd59c950379e54d9c0a42fddeac38a2108c5ee953 (diff)
mb/google/dedede/variant/drawcia: Include SPD for MT53E512M32D1NP-046 WT:B
Add SPD support to drawcia for MT53E512M32D1NP-046 WT:B. This part is already in global_lp4x_mem_parts.json.txt, and use /util/spd_tool/lp4x/gen_part_id to assigns DRAM IDs. BUG=b:196951879 BRANCH=firmware-dedede-13606.B TEST=FW_NAME=drawcia emerge-dedede coreboot chromeos-bootimage Change-Id: Ic42e6357943ba651ffd92fb2974e9ea52fa19020 Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56905 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include/cpu/intel')
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