diff options
| author | Musse Abdullahi <musse.abdullahi@intel.com> | 2023-06-27 11:14:09 -0700 |
|---|---|---|
| committer | Matt DeVillier <matt.devillier@amd.corp-partner.google.com> | 2023-06-29 17:08:17 +0000 |
| commit | 08545aa302a18342ee87c8fe3d05f7007e49df7d (patch) | |
| tree | 068d99f6a339ae5182e64dca6c40f192736375b9 /src/include/cpu/intel | |
| parent | bf557e0d4328703eccba07e52ac620b60083191e (diff) | |
soc/intel/meteorlake: Add QS(C0) stepping CPU ID
This patch adds CPU ID for C0 stepping (aka QS).
DOC=#723567
TEST=Able to boot on C0 rvp (and rex) and get correct CPU Name in coreboot log.
Change-Id: I53e3b197f2a0090e178877c1eef783b41670ca83
Signed-off-by: Musse Abdullahi <musse.abdullahi@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76135
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include/cpu/intel')
| -rw-r--r-- | src/include/cpu/intel/cpu_ids.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/include/cpu/intel/cpu_ids.h b/src/include/cpu/intel/cpu_ids.h index 2d64c5f271..77b018f9fa 100644 --- a/src/include/cpu/intel/cpu_ids.h +++ b/src/include/cpu/intel/cpu_ids.h @@ -72,6 +72,7 @@ #define CPUID_METEORLAKE_A0_1 0xa06a0 #define CPUID_METEORLAKE_A0_2 0xa06a1 #define CPUID_METEORLAKE_B0 0xa06a2 +#define CPUID_METEORLAKE_C0 0xa06a4 #define CPUID_RAPTORLAKE_P_J0 0xb06a2 #define CPUID_RAPTORLAKE_P_Q0 0xb06a3 |