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author | V Sowmya <v.sowmya@intel.com> | 2018-12-24 09:34:15 +0530 |
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committer | Subrata Banik <subrata.banik@intel.com> | 2018-12-25 03:43:34 +0000 |
commit | 656015c258bc131f5fe3b25af23743c11407b1d0 (patch) | |
tree | 1484194d7adb61eee4721c3bbec42d02fd3ce4e6 /src/include/cpu/intel/romstage.h | |
parent | 6aaae1c89341f6f25b003fa0976cdc0620a75d34 (diff) |
mb/google/hatch: Modify hatch SPI flash layout
This patch modifies the hatch flash layout to support
IFWI 1.6 with the following regions,
Flash Region 0: Descriptor
[0x0 - 0xFFF]
Flash Region 1: IFWI (consist of ME and PMC FW)
[0x1000 - 0x3FFFFF]
Flash Region 2: BIOS
[0x1400000 - 0x1FFFFFF]
Change-Id: I3d05fb50e970737a2552b85d6aebed943bf2b6cb
Signed-off-by: V Sowmya <v.sowmya@intel.com>
Reviewed-on: https://review.coreboot.org/c/30413
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include/cpu/intel/romstage.h')
0 files changed, 0 insertions, 0 deletions