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| author | Ronald G. Minnich <rminnich@gmail.com> | 2006-04-06 20:45:10 +0000 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2006-04-06 20:45:10 +0000 |
| commit | 44f72eb3a3d07ec3c775b748f6a2a16e9e0a3e75 (patch) | |
| tree | 34a7f9e5e88898f2a58c3dc1f5ba0403222fbf59 /src/include/cpu/amd | |
| parent | 69085400f1a661abdb93e10cf7a6a8b4a42e540c (diff) | |
add bug support for 2.1
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2239 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/include/cpu/amd')
| -rw-r--r-- | src/include/cpu/amd/gx2def.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/include/cpu/amd/gx2def.h b/src/include/cpu/amd/gx2def.h index 12621e9940..d9407c5424 100644 --- a/src/include/cpu/amd/gx2def.h +++ b/src/include/cpu/amd/gx2def.h @@ -74,7 +74,7 @@ #define GL1_FG 5 -#define MSR_GLIU0 (GL0_GLIU0 << 29) + 1 << 28 /* To get on GeodeLink one bit has to be set */ +#define MSR_GLIU0 (GL0_GLIU0 << 29) + (1 << 28) /* To get on GeodeLink one bit has to be set */ #define MSR_MC (GL0_MC << 29) #define MSR_GLIU1 (GL0_GLIU1 << 29) #define MSR_CPU (GL0_CPU << 29) /* this is not used for BIOS since code executing on CPU doesn't need to be routed*/ |