diff options
author | Lee Leahy <leroy.p.leahy@intel.com> | 2017-03-07 13:17:49 -0800 |
---|---|---|
committer | Lee Leahy <leroy.p.leahy@intel.com> | 2017-03-10 22:28:35 +0100 |
commit | f00e446e746da54b7cf967deae73cf090f3835eb (patch) | |
tree | 54e3b8b61587af5179804491c5e64930852020cf /src/include/cpu/amd | |
parent | 86f60a9c8f218fabc784cbed6c1819b7effec31c (diff) |
src/include: Add parenthesis around macros
Fix the following error found by checkpatch.pl:
ERROR: Macros with complex values should be enclosed in parentheses
False positives are detected for attribute macros. An example is:
ERROR: Macros with complex values should be enclosed in parentheses
+#define BOOT_STATE_INIT_ATTR __attribute__ ((used, section
(".bs_init")))
False positive also generated for macros for linker script files. An
example is:
ERROR: Macros with complex values should be enclosed in parentheses
+#define CBFS_CACHE(addr, size) \
+ REGION(cbfs_cache, addr, size, 4) \
+ ALIAS_REGION(cbfs_cache, preram_cbfs_cache) \
+ ALIAS_REGION(cbfs_cache, postram_cbfs_cache)
False positives generated for assembly code macros. An example is:
ERROR: Macros with complex values should be enclosed in parentheses
+#define DECLARE_OPTIONAL_REGION(name) asm (".weak _" #name ", _e" #name
)
False positive detected when macro includes multiple comma separated
values. The following code is from src/include/device/azalia_device.h:
#define AZALIA_SUBVENDOR(codec, val) \
(((codec) << 28) | (0x01720 << 8) | ((val) & 0xff)), \
(((codec) << 28) | (0x01721 << 8) | (((val) >> 8) & 0xff)), \
(((codec) << 28) | (0x01722 << 8) | (((val) >> 16) & 0xff)), \
(((codec) << 28) | (0x01723 << 8) | (((val) >> 24) & 0xff))
TEST=Build and run on Galileo Gen2
Change-Id: I6e3b6950738e6906851a172ba3a22e3d5af1e35d
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/18649
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/include/cpu/amd')
-rw-r--r-- | src/include/cpu/amd/gx2def.h | 8 | ||||
-rw-r--r-- | src/include/cpu/amd/lxdef.h | 2 | ||||
-rw-r--r-- | src/include/cpu/amd/sc520.h | 6 |
3 files changed, 8 insertions, 8 deletions
diff --git a/src/include/cpu/amd/gx2def.h b/src/include/cpu/amd/gx2def.h index beb4c65483..60db369cf3 100644 --- a/src/include/cpu/amd/gx2def.h +++ b/src/include/cpu/amd/gx2def.h @@ -78,7 +78,7 @@ #define GL1_PCI 4 #define GL1_FG 5 -#define MSR_GLIU0 (GL0_GLIU0 << 29) + (1 << 28) /* 1000xxxx - To get on GeodeLink one bit has to be set */ +#define MSR_GLIU0 ((GL0_GLIU0 << 29) + (1 << 28)) /* 1000xxxx - To get on GeodeLink one bit has to be set */ #define MSR_MC (GL0_MC << 29) /* 2000xxxx */ #define MSR_GLIU1 (GL0_GLIU1 << 29) /* 4000xxxx */ #define MSR_CPU (GL0_CPU << 29) /* 6000xxxx - this is not used for BIOS since code executing on CPU doesn't need to be routed */ @@ -86,9 +86,9 @@ #define MSR_GP (GL0_GP << 29) /* A000xxxx */ #define MSR_DF (GL0_DF << 29) /* C000xxxx */ -#define MSR_GLCP (GL1_GLCP << 26) + MSR_GLIU1 /* 4C00xxxx */ -#define MSR_PCI (GL1_PCI << 26) + MSR_GLIU1 /* 5000xxxx */ -#define MSR_FG (GL1_FG << 26) + MSR_GLIU1 /* 5400xxxx */ +#define MSR_GLCP ((GL1_GLCP << 26) + MSR_GLIU1) /* 4C00xxxx */ +#define MSR_PCI ((GL1_PCI << 26) + MSR_GLIU1) /* 5000xxxx */ +#define MSR_FG ((GL1_FG << 26) + MSR_GLIU1) /* 5400xxxx */ /* GeodeLink Interface Unit 0 (GLIU0) port0 */ #define GLIU0_GLD_MSR_CAP (MSR_GLIU0 + 0x2000) diff --git a/src/include/cpu/amd/lxdef.h b/src/include/cpu/amd/lxdef.h index 19b1efa3d6..4865bea2ed 100644 --- a/src/include/cpu/amd/lxdef.h +++ b/src/include/cpu/amd/lxdef.h @@ -59,7 +59,7 @@ #define GL1_AES 6 -#define MSR_GLIU0 (GL0_GLIU0 << 29) + (1 << 28) /* 1000xxxx, To get on GeodeLink one bit has to be set */ +#define MSR_GLIU0 ((GL0_GLIU0 << 29) + (1 << 28)) /* 1000xxxx, To get on GeodeLink one bit has to be set */ #define MSR_MC (GL0_MC << 29) /* 2000xxxx */ #define MSR_GLIU1 (GL0_GLIU1 << 29) /* 4000xxxx */ #define MSR_CPU (GL0_CPU << 29) /* 0000xxxx this is not used for BIOS since code executing on CPU doesn't need to be routed*/ diff --git a/src/include/cpu/amd/sc520.h b/src/include/cpu/amd/sc520.h index 53a62b5880..4e748be530 100644 --- a/src/include/cpu/amd/sc520.h +++ b/src/include/cpu/amd/sc520.h @@ -10,11 +10,11 @@ struct parreg { unsigned long reg[16]; }; -#define PARREG (struct parreg *)0xfffef088 +#define PARREG ((struct parreg *)0xfffef088) //static volatile struct parreg *par = PARREG; -#define MMCRPIC (struct mmcrpic *) 0xfffefd00 +#define MMCRPIC ((struct mmcrpic *) 0xfffefd00) //static volatile struct mmcrpic *pic = MMCRPIC; #define M_GINT_MODE 1 @@ -308,4 +308,4 @@ struct mmcr { }; -#define MMCRDEFAULT (struct mmcr *) 0xfffef000 +#define MMCRDEFAULT ((struct mmcr *) 0xfffef000) |