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authorElyes HAOUAS <ehaouas@noos.fr>2016-07-28 21:25:21 +0200
committerMartin Roth <martinroth@google.com>2016-07-31 18:30:16 +0200
commit918535a657b4ee393708640aa2e8ed3c75de20b9 (patch)
treeb30037239dd2f44555348c95f3cc5a287a5f1f77 /src/include/console
parent1bcd7fcb6199528fc82685e161d6b39f273a1962 (diff)
src/include: Capitalize CPU, RAM and ROM
Change-Id: Id40c1bf868820c77ea20146d19c6d552c2f970c4 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/15942 Tested-by: build bot (Jenkins) Reviewed-by: Omar Pakker Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/include/console')
-rw-r--r--src/include/console/post_codes.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/include/console/post_codes.h b/src/include/console/post_codes.h
index 8e47905904..c7722e5faf 100644
--- a/src/include/console/post_codes.h
+++ b/src/include/console/post_codes.h
@@ -82,14 +82,14 @@
#define POST_ENTRY_C_START 0x13
/**
- * \brief Pre call to ram stage main()
+ * \brief Pre call to RAM stage main()
*
- * POSTed right before ram stage main() is called from c_start.S
+ * POSTed right before RAM stage main() is called from c_start.S
*/
#define POST_PRE_HARDWAREMAIN 0x79
/**
- * \brief Entry into coreboot in ram stage main()
+ * \brief Entry into coreboot in RAM stage main()
*
* This is the first call in hardwaremain.c. If this code is POSTed, then
* ramstage has successfully loaded and started executing.