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| author | Subrata Banik <subratabanik@google.com> | 2023-06-23 19:40:14 +0530 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2023-06-26 12:56:00 +0000 |
| commit | 249aede238050e6a6ab71d3c6fb72aa5b5d4e78f (patch) | |
| tree | 95488295f64a28e5ea75b75bc1013b3f3bda978b /src/include/console/i2c_smbus.h | |
| parent | 80254118ac73233485d5d01b174036429c80282d (diff) | |
mb/google/rex: Avoid LPDDR5/x hang
This patch avoids random hang issue observed after booted to OS on LPDD5/x platforms due to CLK not tuned properly in SAGV point 0, 2133MT/s.
As per Intel doc 769410 the expected work around is to change SAGV
point 0 from 2133 G4 to 3200 G4.
BUG=b:287170545
TEST=Able to perform 500 power cycles on google/rex without any hang.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I02a9cadc075f396549703d7a008382e76268f865
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76076
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include/console/i2c_smbus.h')
0 files changed, 0 insertions, 0 deletions