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authorDuncan Laurie <dlaurie@chromium.org>2013-09-25 14:05:31 -0700
committerPatrick Georgi <patrick@georgi-clan.de>2014-08-10 22:19:58 +0200
commitd988b612c76cb34f689c567e9e983e496f65008a (patch)
tree01acfa79c920b335167f8dee9c4e2fcf1f21f3dd /src/include/bootmem.h
parentcff6667eba803498e2f93af68e6e2edbba2353e5 (diff)
bolt: Set GPIO29 as input in S0, output+high in S3/S5
This resolves WiFi issues after suspend/resume. It needs related SPI descriptor soft strap change to enable SLP_WLAN as a GPIO instead of owned by the ME. Change-Id: I03f4458d1e52a913770d391061baa6cfa41e8558 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/170577 Reviewed-by: Aaron Durbin <adurbin@chromium.org> (cherry picked from commit cf1fe0524ad4793c8c422dc3fed3007b7fc96038) Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6533 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/include/bootmem.h')
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