soc/amd/picasso/southbridge: make GPP clock outputs configurable

Make the general purpose PCIe clock outputs configurable to be either
permanently enabled, permanently disabled or dynamically enabled via
their corresponding external #CLK_REQx pins in the board's devicetree.

BUG=b:149970243
BRANCH=zork

Change-Id: I3f5760c0b869e8a9416ba9b57d182a88a2eb5e44
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44889
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

0 files changed, 0 insertions, 0 deletions