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| author | Arthur Heymans <arthur@aheymans.xyz> | 2021-02-24 19:21:33 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-03-28 15:28:19 +0000 |
| commit | f8daf86282c1be33643ace4e9f453e7548cab41c (patch) | |
| tree | 955ae7a9b9533b64b40ccc250a9f64b4630fedfc /src/include/boot/tables.h | |
| parent | ec97e0a29dc7441a191bc14179b36a8f233a8122 (diff) | |
nb/intel/sandybridge/acpi: Support setting PCI bars above 4G
Although coreboot can allocate resources above 4G, Linux does not
consider those allocation valid when there is no region above 4G in
_CRS and disables the device.
TESTED: x220 with and external GPU via the expresscard slot. Linux
does not touch the BARs allocated above 4G.
Change-Id: If1be9a2c1e03e5465fd3b164469511eca60edc5a
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51060
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/include/boot/tables.h')
0 files changed, 0 insertions, 0 deletions