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authorSubrata Banik <subrata.banik@intel.com>2018-06-21 11:52:21 +0530
committerSubrata Banik <subrata.banik@intel.com>2018-06-22 01:58:33 +0000
commitd5018a8f78b9e1f0b7d3d1be298cba9716b10c6c (patch)
tree677c73abcfa2193e9c6aafc1144ae300e1fef864 /src/include/boardid.h
parentf699c14c03a78549b0e5ed32cf9714473127c618 (diff)
soc/intel/cannonlake: Remove DMA support for PTT
Alternative buffer communication support for PTT is no longer needed for CNL onwards and coreboot does not need to reserve additional 4KiB memory for PTT support. Change-Id: I11993cef77fd5e879eedabc1ed344f91f8257c90 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/27176 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include/boardid.h')
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