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authorTan, Lean Sheng <lean.sheng.tan@intel.com>2020-08-25 20:40:17 -0700
committerPatrick Georgi <pgeorgi@google.com>2020-09-08 05:29:37 +0000
commit05dfe3177dc728995e93ef6f9d1aa549bcbaa032 (patch)
tree5817d8dde3c1fa73e97ed401de848efdc9a6a32d /src/include/adainit.h
parent320f2c1f06c355366ed105c037b254c5bfda56f3 (diff)
soc/intel/elkhartlake: Do initial SoC commit till ramstage
Clone entirely from Jasperlake List of changes on top off initial jasperlake clone 1. Replace "Jasperlake" with "Elkhartlake" 2. Replace "jsl" with "ehl" 3. Replace "jsp" with "mcc" 4. Rename structure based on Jasperlake with Elkhartlake 5. Clean up upd override in fsp_params.c will be added later 6. Sort #include files alphabetically as per comment 7. Remove doc details from espi.c until it is ready 8. Remove pch_isclk & camera clocks related codes 9. Add new #define NMI_STS_CNT & NMI_EN as per comment Signed-off-by: Tan, Lean Sheng <lean.sheng.tan@intel.com> Change-Id: I372b0bb5912e013445ed8df7c58d0a9ee9a7cf35 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44802 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
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