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authorKeith Hui <buurin@gmail.com>2024-07-22 18:32:35 -0400
committerFelix Held <felix-coreboot@felixheld.de>2024-08-05 23:45:25 +0000
commit4ea6f9c28865df77627f657f5cc648777db7c284 (patch)
treeb9c27a49bd93efbc1ef3f61525885bc0639704e2 /src/include/acpi/acpi_pm.h
parent1360d65c98ad964748e551f9972ba5b24ca75bc8 (diff)
mb/asus/p8z77-m_pro/overridetree.cb: Correct PCIe devices config
Match PCIe root port allocation and associated comments to boardview, as follows: Z77 PCIe ports 1-4: PCIEX16_3 (x4) Z77 PCIe port 5: PCIEX1_1 Z77 PCIe port 6: RTL8111F LAN Z77 PCIe port 7: ASM1042 USB3 Z77 PCIe port 8: ASM1061 eSATA CPU PCIe lanes 1-8: PCIEX16_1 CPU PCIe lanes 9-16: Multiplexed via 4x ASM1480 to PCIEX16_1 lanes 9-16 and PCIEX16_2 lanes 1-8 (CPU PCIe lanes are not covered by overridetree.cb.) These are not hardware tested. Change-Id: I472e28add254ea945b401d1ddfd03f29f46d8fd2 Signed-off-by: Keith Hui <buurin@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83607 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Diffstat (limited to 'src/include/acpi/acpi_pm.h')
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