summaryrefslogtreecommitdiff
path: root/src/include/acpi/acpi.h
diff options
context:
space:
mode:
authorSukumar Ghorai <sukumar.ghorai@intel.com>2023-09-28 23:44:30 -0700
committerSubrata Banik <subratabanik@google.com>2023-10-05 15:22:04 +0000
commited1c03a138ccfb4d1939f15fbe97ab0b8f7e4015 (patch)
tree78f1fd8d32bc2227f9851fd271dafd977361662e /src/include/acpi/acpi.h
parent1e2541074f038f51df88921af3ea0d134fb1265f (diff)
soc/intel: separate slp-s0 residency counter frequency in LPIT table
Intel platforms use Low Power Idle Table (LPIT) to enumerate platform Low Power Idle states. There are two types of low power residencies a) CPU PKG C10 - read via MSR (Function fixed hardware interface) b) Platform Controller Hub (PCH) SLP_S0 - read via memory mapped IO Ref. https://www.uefi.org/sites/default/files/resources/Intel_ACPI_Low_Power_S0_Idle.pdf, section 2.2.1: value of 0 indicates that counter runs at TSC frequency. Ref. Intel 64 and IA-32 Architectures Software Developer’s Manual (Vol 4) MSR 0x632: PC10 residency counter is at same frequency as the TSC. Whereas slp_s0 residency counter running in different frequency. BUG=b:300440936 TEST=check kernel cpuidle sysfs are created after kernel boot cat /sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us cat /sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us Change-Id: Ibde764551a21b9aecb1c269948f4823548294711 Signed-off-by: Sukumar Ghorai <sukumar.ghorai@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78177 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kapil Porwal <kapilporwal@google.com> Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/include/acpi/acpi.h')
-rw-r--r--src/include/acpi/acpi.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/include/acpi/acpi.h b/src/include/acpi/acpi.h
index 141e4d3ad8..eae84a8071 100644
--- a/src/include/acpi/acpi.h
+++ b/src/include/acpi/acpi.h
@@ -453,7 +453,8 @@ typedef struct acpi_lpi_desc_hdr {
uint16_t reserved;
} __packed acpi_lpi_desc_hdr_t;
-#define ACPI_LPIT_CTR_FREQ_TSC 0
+#define ACPI_LPIT_CTR_FREQ_TSC 0
+#define ACPI_LPIT_SLP_S0_FREQ 0
/* LPIT: Native C-state instruction based LPI structure */
typedef struct acpi_lpi_desc_ncst {