diff options
author | Duncan Laurie <dlaurie@chromium.org> | 2015-09-04 10:14:18 -0700 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2015-09-09 20:23:04 +0000 |
commit | ab40b9196977de2c37e37fc28e98bea4596460a7 (patch) | |
tree | 2598137c4cbe2fca74d48e95f3d2d294e733b063 /src/ec | |
parent | 372b67e22b61a38fea3549b6658cdfe127459aab (diff) |
chromeec: Add kconfig entry for EC PD support
Add a kconfig entry to indicate that a board has a PD chip and
try to put it in RO mode before the EC during early init.
BUG=chrome-os-partner:40635
BRANCH=none
TEST=emerge-glados coreboot
Change-Id: I170271de9b929fcb73d6b0e09171385a6d23f153
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 17e2d13261f4e35a8148039e324e22ec1da64b3c
Original-Change-Id: I44eed5401beb1dc286e316cf0cc958da791580a5
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/297747
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11571
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/ec')
-rw-r--r-- | src/ec/google/chromeec/Kconfig | 6 | ||||
-rw-r--r-- | src/ec/google/chromeec/ec.c | 11 |
2 files changed, 14 insertions, 3 deletions
diff --git a/src/ec/google/chromeec/Kconfig b/src/ec/google/chromeec/Kconfig index 25cc0e4b24..2a86f33362 100644 --- a/src/ec/google/chromeec/Kconfig +++ b/src/ec/google/chromeec/Kconfig @@ -47,6 +47,12 @@ config EC_GOOGLE_CHROMEEC_MEC help Microchip EC variant for LPC register access. +config EC_GOOGLE_CHROMEEC_PD + depends on EC_GOOGLE_CHROMEEC + def_bool n + help + Indicates that Google's Chrome USB PD chip is present. + config EC_GOOGLE_CHROMEEC_SPI depends on EC_GOOGLE_CHROMEEC def_bool n diff --git a/src/ec/google/chromeec/ec.c b/src/ec/google/chromeec/ec.c index de58d9750e..e1006dcefc 100644 --- a/src/ec/google/chromeec/ec.c +++ b/src/ec/google/chromeec/ec.c @@ -163,9 +163,14 @@ void google_chromeec_check_ec_image(int expected_type) /* Check for recovery mode and ensure EC is in RO */ void google_chromeec_early_init(void) { - /* If in recovery ensure EC is running RO firmware. */ - if (recovery_mode_enabled()) { - google_chromeec_check_ec_image(EC_IMAGE_RO); + if (IS_ENABLED(CONFIG_CHROMEOS)) { + /* Check USB PD chip state first */ + if (IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC_PD)) + google_chromeec_early_pd_init(); + + /* If in recovery ensure EC is running RO firmware. */ + if (recovery_mode_enabled()) + google_chromeec_check_ec_image(EC_IMAGE_RO); } } |