diff options
author | Prashant Malani <pmalani@chromium.org> | 2022-04-01 20:19:20 +0000 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2022-05-04 13:14:57 +0000 |
commit | 688105bc60e0a352b2f89e51bc34fd9b04d495c7 (patch) | |
tree | 17c05e5321b694d478427e2c2a4e5193d5d0b443 /src/ec | |
parent | ff352de0fb3011b6e8f015e24648748cffd7e59b (diff) |
ec/google/chromeec: Add EC Mux device
Introduce an EC Mux ACPI device, which will control retimer and discrete
(off-AP) mux configuration.
BUG=b:208883648
TEST=None
BRANCH=None
Change-Id: Ia2022810292783583ee5f09ce29a63b96686dbb8
Signed-off-by: Prashant Malani <pmalani@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63792
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/ec')
-rw-r--r-- | src/ec/google/chromeec/Makefile.inc | 1 | ||||
-rw-r--r-- | src/ec/google/chromeec/mux/Kconfig | 11 | ||||
-rw-r--r-- | src/ec/google/chromeec/mux/Makefile.inc | 2 | ||||
-rw-r--r-- | src/ec/google/chromeec/mux/conn/Makefile.inc | 1 | ||||
-rw-r--r-- | src/ec/google/chromeec/mux/conn/conn.c | 43 | ||||
-rw-r--r-- | src/ec/google/chromeec/mux/mux.c | 41 |
6 files changed, 99 insertions, 0 deletions
diff --git a/src/ec/google/chromeec/Makefile.inc b/src/ec/google/chromeec/Makefile.inc index 23e7b3d479..f6c53d3880 100644 --- a/src/ec/google/chromeec/Makefile.inc +++ b/src/ec/google/chromeec/Makefile.inc @@ -2,6 +2,7 @@ ifeq ($(CONFIG_EC_GOOGLE_CHROMEEC),y) subdirs-y += audio_codec subdirs-y += i2c_tunnel +subdirs-y += mux bootblock-$(CONFIG_EC_GOOGLE_CHROMEEC_BOARDID) += ec_boardid.c verstage-$(CONFIG_EC_GOOGLE_CHROMEEC_BOARDID) += ec_boardid.c diff --git a/src/ec/google/chromeec/mux/Kconfig b/src/ec/google/chromeec/mux/Kconfig new file mode 100644 index 0000000000..654ff82c88 --- /dev/null +++ b/src/ec/google/chromeec/mux/Kconfig @@ -0,0 +1,11 @@ +if EC_GOOGLE_CHROMEEC + +config EC_GOOGLE_CHROMEEC_MUX + bool + depends on HAVE_ACPI_TABLES + help + This enables the Cros EC Mux driver that is required to fill the + SSDT nodes for the EC Mux platform device which is used to + configure Type C muxes and retimers. + +endif diff --git a/src/ec/google/chromeec/mux/Makefile.inc b/src/ec/google/chromeec/mux/Makefile.inc new file mode 100644 index 0000000000..c4cef75a9e --- /dev/null +++ b/src/ec/google/chromeec/mux/Makefile.inc @@ -0,0 +1,2 @@ +subdirs-y += conn +ramstage-$(CONFIG_EC_GOOGLE_CHROMEEC_MUX) += mux.c diff --git a/src/ec/google/chromeec/mux/conn/Makefile.inc b/src/ec/google/chromeec/mux/conn/Makefile.inc new file mode 100644 index 0000000000..1f837ca2f8 --- /dev/null +++ b/src/ec/google/chromeec/mux/conn/Makefile.inc @@ -0,0 +1 @@ +ramstage-$(CONFIG_EC_GOOGLE_CHROMEEC_MUX) += conn.c diff --git a/src/ec/google/chromeec/mux/conn/conn.c b/src/ec/google/chromeec/mux/conn/conn.c new file mode 100644 index 0000000000..43f5595aa7 --- /dev/null +++ b/src/ec/google/chromeec/mux/conn/conn.c @@ -0,0 +1,43 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <acpi/acpigen.h> + +static const char *conn_acpi_name(const struct device *dev) +{ + static char name[5]; + snprintf(name, sizeof(name), "CON%1X", dev->path.generic.id); + return name; +} + +static void conn_fill_ssdt(const struct device *dev) +{ + const char *name; + name = acpi_device_name(dev); + if (!name) + return; + + acpigen_write_scope(acpi_device_scope(dev)); + acpigen_write_device(name); + + acpigen_write_name_integer("_ADR", dev->path.generic.id); + + acpigen_write_device_end(); + acpigen_write_scope_end(); +} + +static struct device_operations conn_dev_ops = { + .read_resources = noop_read_resources, + .set_resources = noop_set_resources, + .acpi_name = conn_acpi_name, + .acpi_fill_ssdt = conn_fill_ssdt, +}; + +static void conn_enable(struct device *dev) +{ + dev->ops = &conn_dev_ops; +} + +struct chip_operations ec_google_chromeec_mux_conn_ops = { + CHIP_NAME("CrosEC Type C Mux device") + .enable_dev = conn_enable, +}; diff --git a/src/ec/google/chromeec/mux/mux.c b/src/ec/google/chromeec/mux/mux.c new file mode 100644 index 0000000000..9324d2e4f2 --- /dev/null +++ b/src/ec/google/chromeec/mux/mux.c @@ -0,0 +1,41 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <acpi/acpigen.h> + +#define GOOGLE_CHROMEEC_MUX_DEVICE_HID "GOOG001A" +#define GOOGLE_CHROMEEC_MUX_DEVICE_NAME "ECMX" + +static void mux_fill_ssdt(const struct device *dev) +{ + acpigen_write_scope(acpi_device_scope(dev)); + acpigen_write_device(GOOGLE_CHROMEEC_MUX_DEVICE_NAME); + acpigen_write_name_string("_HID", GOOGLE_CHROMEEC_MUX_DEVICE_HID); + acpigen_write_name_string("_DDN", "ChromeOS EC Embedded Controller " + "Mux & Retimer control"); + + acpigen_write_device_end(); + acpigen_write_scope_end(); +} + +static const char *mux_acpi_name(const struct device *dev) +{ + return GOOGLE_CHROMEEC_MUX_DEVICE_NAME; +} + +static struct device_operations mux_ops = { + .read_resources = noop_read_resources, + .set_resources = noop_set_resources, + .acpi_name = mux_acpi_name, + .acpi_fill_ssdt = mux_fill_ssdt, + .scan_bus = scan_static_bus, +}; + +static void mux_enable(struct device *dev) +{ + dev->ops = &mux_ops; +} + +struct chip_operations ec_google_chromeec_mux_ops = { + CHIP_NAME("CrosEC Type C Mux device") + .enable_dev = mux_enable +}; |