diff options
author | Scott Chao <scott_chao@wistron.corp-partner.google.com> | 2021-07-30 10:40:57 +0800 |
---|---|---|
committer | Paul Fagerburg <pfagerburg@chromium.org> | 2021-08-06 16:26:51 +0000 |
commit | 18141d8c514a2281c1872d4598fa8402aa29971e (patch) | |
tree | 9ebe8f98b075c41e385d4ed828c78ae22da42440 /src/ec | |
parent | 3ecf50bd7ae7344b801b12015e7d75afd705e169 (diff) |
ec/google/chromeec: Add code for KEY_MICMUTE and KEY_KBD_BKLIGHT_TOGGLE
- Chromebook have some platform need support MICMUTE and KBDILLUMTOGGLE.
- Sync ec_commands.h
This change syncs the coreboot version of google ec_commands.h with the
ec_commands.h from the google ec repository. This is a straight copy
except for the the copyright header.
BUG=b:194146863
BRANCH=none
TEST=check on evtest
type 4 (EV_MSC), code 4 (MSC_SCAN), value 9e
type 1 (EV_KEY), code 228 (KEY_KBDILLUMTOGGLE), 1
type 4 (EV_MSC), code 4 (MSC_SCAN), value 9b
type 1 (EV_KEY), code 248 (KEY_MICMUTE), value 1
Signed-off-by: Scott Chao <scott_chao@wistron.corp-partner.google.com>
Change-Id: Ie4fa3e627f448265f72279704d258b2d3fe8fc17
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56710
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/ec')
-rw-r--r-- | src/ec/google/chromeec/ec_acpi.c | 2 | ||||
-rw-r--r-- | src/ec/google/chromeec/ec_commands.h | 61 |
2 files changed, 61 insertions, 2 deletions
diff --git a/src/ec/google/chromeec/ec_acpi.c b/src/ec/google/chromeec/ec_acpi.c index 4b3f78188b..059836485f 100644 --- a/src/ec/google/chromeec/ec_acpi.c +++ b/src/ec/google/chromeec/ec_acpi.c @@ -184,6 +184,8 @@ static const enum ps2_action_key ps2_enum_val[] = { [TK_PLAY_PAUSE] = PS2_KEY_PLAY_PAUSE, [TK_NEXT_TRACK] = PS2_KEY_NEXT_TRACK, [TK_PREV_TRACK] = PS2_KEY_PREV_TRACK, + [TK_KBD_BKLIGHT_TOGGLE] = PS2_KEY_KBD_BKLIGHT_TOGGLE, + [TK_MICMUTE] = PS2_KEY_MICMUTE, }; static void fill_ssdt_ps2_keyboard(const struct device *dev) diff --git a/src/ec/google/chromeec/ec_commands.h b/src/ec/google/chromeec/ec_commands.h index 7ba35655a7..594d2ee5b3 100644 --- a/src/ec/google/chromeec/ec_commands.h +++ b/src/ec/google/chromeec/ec_commands.h @@ -452,6 +452,13 @@ extern "C" { #define USB_RETIMER_FW_UPDATE_OP_SHIFT 4 #define USB_RETIMER_FW_UPDATE_ERR 0xfe #define USB_RETIMER_FW_UPDATE_INVALID_MUX 0xff +/* Mask to clear unused MUX bits in retimer firmware update */ +#define USB_RETIMER_FW_UPDATE_MUX_MASK (USB_PD_MUX_USB_ENABLED | \ + USB_PD_MUX_DP_ENABLED | \ + USB_PD_MUX_SAFE_MODE | \ + USB_PD_MUX_TBT_COMPAT_ENABLED | \ + USB_PD_MUX_USB4_ENABLED) + /* Retimer firmware update operations */ #define USB_RETIMER_FW_UPDATE_QUERY_PORT 0 /* Which ports has retimer */ #define USB_RETIMER_FW_UPDATE_SUSPEND_PD 1 /* Suspend PD port */ @@ -1946,7 +1953,13 @@ enum sysinfo_flags { SYSTEM_IS_FORCE_LOCKED = BIT(1), SYSTEM_JUMP_ENABLED = BIT(2), SYSTEM_JUMPED_TO_CURRENT_IMAGE = BIT(3), - SYSTEM_REBOOT_AT_SHUTDOWN = BIT(4) + SYSTEM_REBOOT_AT_SHUTDOWN = BIT(4), + /* + * Used internally. It's set when EC_HOST_EVENT_KEYBOARD_RECOVERY is + * set and cleared when the system shuts down (not when the host event + * flag is cleared). + */ + SYSTEM_IN_MANUAL_RECOVERY = BIT(5), }; struct ec_response_sysinfo { @@ -2670,6 +2683,8 @@ enum motionsensor_chip { MOTIONSENSE_CHIP_BMI260 = 24, MOTIONSENSE_CHIP_ICM426XX = 25, MOTIONSENSE_CHIP_ICM42607 = 26, + MOTIONSENSE_CHIP_BMA422 = 27, + MOTIONSENSE_CHIP_BMI323 = 28, MOTIONSENSE_CHIP_MAX, }; @@ -4246,16 +4261,55 @@ struct ec_params_i2c_write { * discharge the battery. */ #define EC_CMD_CHARGE_CONTROL 0x0096 -#define EC_VER_CHARGE_CONTROL 1 +#define EC_VER_CHARGE_CONTROL 2 enum ec_charge_control_mode { CHARGE_CONTROL_NORMAL = 0, CHARGE_CONTROL_IDLE, CHARGE_CONTROL_DISCHARGE, + /* Add no more entry below. */ + CHARGE_CONTROL_COUNT, +}; + +#define EC_CHARGE_MODE_TEXT { \ + [CHARGE_CONTROL_NORMAL] = "NORMAL", \ + [CHARGE_CONTROL_IDLE] = "IDLE", \ + [CHARGE_CONTROL_DISCHARGE] = "DISCHARGE", \ + } + +enum ec_charge_control_cmd { + EC_CHARGE_CONTROL_CMD_SET = 0, + EC_CHARGE_CONTROL_CMD_GET, }; struct ec_params_charge_control { uint32_t mode; /* enum charge_control_mode */ + + /* Below are the fields added in V2. */ + uint8_t cmd; /* enum ec_charge_control_cmd. */ + uint8_t reserved; + /* + * Lower and upper thresholds for battery sustainer. This struct isn't + * named to avoid tainting foreign projects' name spaces. + * + * If charge mode is explicitly set (e.g. DISCHARGE), battery sustainer + * will be disabled. To disable battery sustainer, set mode=NORMAL, + * lower=-1, upper=-1. + */ + struct { + int8_t lower; /* Display SoC in percentage. */ + int8_t upper; /* Display SoC in percentage. */ + } sustain_soc; +} __ec_align4; + +/* Added in v2 */ +struct ec_response_charge_control { + uint32_t mode; /* enum charge_control_mode */ + struct { /* Battery sustainer thresholds */ + int8_t lower; + int8_t upper; + } sustain_soc; + uint16_t reserved; } __ec_align4; /*****************************************************************************/ @@ -6331,6 +6385,8 @@ enum action_key { TK_PLAY_PAUSE = 15, TK_NEXT_TRACK = 16, TK_PREV_TRACK = 17, + TK_KBD_BKLIGHT_TOGGLE = 18, + TK_MICMUTE = 19, }; /* @@ -6648,6 +6704,7 @@ enum tcpc_cc_polarity { #define PD_STATUS_EVENT_SOP_DISC_DONE BIT(0) #define PD_STATUS_EVENT_SOP_PRIME_DISC_DONE BIT(1) #define PD_STATUS_EVENT_HARD_RESET BIT(2) +#define PD_STATUS_EVENT_DISCONNECTED BIT(3) /* * Encode and decode for BCD revision response |