diff options
| author | Sean Rhodes <sean@starlabs.systems> | 2022-03-10 21:02:12 +0000 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-03-21 16:57:37 +0000 |
| commit | fbb46c5438c34ec57882b7367ea98cc0000868c1 (patch) | |
| tree | c4f86d170a464f426f7974479bef7248fe37f039 /src/ec/starlabs/merlin | |
| parent | 52a1898d4430e81f8249561724ab0e911ba900b8 (diff) | |
ec/starlabs/merlin: Always store EC values
The EC values will be changed when entering S3, S4 or S5, so move
the function that stores the current settings outside of logic
that restricts it to S4 or S5. This means the state isn't lost
when entering S3.
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: Ia007a8ad9c08a309489e9f64f1ed311858bfcd10
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62741
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/ec/starlabs/merlin')
| -rw-r--r-- | src/ec/starlabs/merlin/acpi/suspend.asl | 108 |
1 files changed, 53 insertions, 55 deletions
diff --git a/src/ec/starlabs/merlin/acpi/suspend.asl b/src/ec/starlabs/merlin/acpi/suspend.asl index 679281a0b3..e0e89a3adc 100644 --- a/src/ec/starlabs/merlin/acpi/suspend.asl +++ b/src/ec/starlabs/merlin/acpi/suspend.asl @@ -2,67 +2,65 @@ Method (RPTS, 1, Serialized) { - If ((Arg0 == 0x04) || (Arg0 == 0x05)) + + /* Store current EC settings in CMOS */ + Switch (ToInteger (\_SB.PCI0.LPCB.EC.ECRD (RefOf (\_SB.PCI0.LPCB.EC.TPLE)))) { - /* Store current EC settings in CMOS */ - Switch (ToInteger (\_SB.PCI0.LPCB.EC.ECRD (RefOf (\_SB.PCI0.LPCB.EC.TPLE)))) - { - // 0x00 == Enabled == 0x00 - // 0x11 == Re-enabled == 0x00 - // 0x22 == Disabled == 0x01 - Case (0x00) - { - \_SB.PCI0.LPCB.TPLC = 0x00 - } - Case (0x11) - { - \_SB.PCI0.LPCB.TPLC = 0x00 - } - Case (0x22) - { - \_SB.PCI0.LPCB.TPLC = 0x01 - } + // 0x00 == Enabled == 0x00 + // 0x11 == Re-enabled == 0x00 + // 0x22 == Disabled == 0x01 + Case (0x00) + { + \_SB.PCI0.LPCB.TPLC = 0x00 + } + Case (0x11) + { + \_SB.PCI0.LPCB.TPLC = 0x00 } + Case (0x22) + { + \_SB.PCI0.LPCB.TPLC = 0x01 + } + } - \_SB.PCI0.LPCB.FLKC = - \_SB.PCI0.LPCB.EC.ECRD (RefOf (\_SB.PCI0.LPCB.EC.FLKE)) + \_SB.PCI0.LPCB.FLKC = + \_SB.PCI0.LPCB.EC.ECRD (RefOf (\_SB.PCI0.LPCB.EC.FLKE)) - Switch (ToInteger (\_SB.PCI0.LPCB.EC.ECRD (RefOf (\_SB.PCI0.LPCB.EC.KLSE)))) - { - // 0x00 == Disabled == 0x00 - // 0xdd == Enabled == 0x01 - Case (0x00) - { - \_SB.PCI0.LPCB.KLSC = 0x00 - } - Case (0xdd) - { - \_SB.PCI0.LPCB.KLSC = 0x01 - } + Switch (ToInteger (\_SB.PCI0.LPCB.EC.ECRD (RefOf (\_SB.PCI0.LPCB.EC.KLSE)))) + { + // 0x00 == Disabled == 0x00 + // 0xdd == Enabled == 0x01 + Case (0x00) + { + \_SB.PCI0.LPCB.KLSC = 0x00 + } + Case (0xdd) + { + \_SB.PCI0.LPCB.KLSC = 0x01 } + } - Switch (ToInteger (\_SB.PCI0.LPCB.EC.ECRD (RefOf (\_SB.PCI0.LPCB.EC.KLBE)))) - { - // 0xdd == On == 0x00 - // 0xcc == Off == 0x01 - // 0xbb == Low == 0x02 - // 0xaa == High == 0x03 - Case (0xdd) - { - \_SB.PCI0.LPCB.KLBC = 0x00 - } - Case (0xcc) - { - \_SB.PCI0.LPCB.KLBC = 0x01 - } - Case (0xbb) - { - \_SB.PCI0.LPCB.KLBC = 0x02 - } - Case (0xaa) - { - \_SB.PCI0.LPCB.KLBC = 0x03 - } + Switch (ToInteger (\_SB.PCI0.LPCB.EC.ECRD (RefOf (\_SB.PCI0.LPCB.EC.KLBE)))) + { + // 0xdd == On == 0x00 + // 0xcc == Off == 0x01 + // 0xbb == Low == 0x02 + // 0xaa == High == 0x03 + Case (0xdd) + { + \_SB.PCI0.LPCB.KLBC = 0x00 + } + Case (0xcc) + { + \_SB.PCI0.LPCB.KLBC = 0x01 + } + Case (0xbb) + { + \_SB.PCI0.LPCB.KLBC = 0x02 + } + Case (0xaa) + { + \_SB.PCI0.LPCB.KLBC = 0x03 } } |