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authorSean Rhodes <sean@starlabs.systems>2022-03-05 10:22:39 +0000
committerFelix Held <felix-coreboot@felixheld.de>2022-03-10 15:06:23 +0000
commit700b5155ac45fc4ab9fc7d8fbdb21d6fe8d3f9a8 (patch)
treed72c22c55d97c9548f0739b706a13aaa514ee3f6 /src/ec/starlabs/merlin
parent56a6e0eb7e142a00bcc1eca1a7280448f8c43170 (diff)
ec/starlabs: Store the correct value for TPLE when suspending
The current code will read the raw value from the EC, which doesn't match the respective setting in CMOS. Switch argument will store the correct value. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I921be8aea55b95f1ba233d2640d9bae80f8c3703 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62604 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/ec/starlabs/merlin')
-rw-r--r--src/ec/starlabs/merlin/acpi/suspend.asl21
1 files changed, 19 insertions, 2 deletions
diff --git a/src/ec/starlabs/merlin/acpi/suspend.asl b/src/ec/starlabs/merlin/acpi/suspend.asl
index 438972915d..9f88a05ef6 100644
--- a/src/ec/starlabs/merlin/acpi/suspend.asl
+++ b/src/ec/starlabs/merlin/acpi/suspend.asl
@@ -5,8 +5,25 @@ Method (RPTS, 1, Serialized)
If ((Arg0 == 0x04) || (Arg0 == 0x05))
{
/* Store current EC settings in CMOS */
- \_SB.PCI0.LPCB.TPLC =
- \_SB.PCI0.LPCB.EC.ECRD (RefOf (\_SB.PCI0.LPCB.EC.TPLE))
+ Switch (ToInteger (\_SB.PCI0.LPCB.EC.ECRD (RefOf (\_SB.PCI0.LPCB.EC.TPLE))))
+ {
+ // 0x00 == Enabled == 0x00
+ // 0x11 == Re-enabled == 0x00
+ // 0x22 == Disabled == 0x01
+ Case (0x00)
+ {
+ \_SB.PCI0.LPCB.TPLC = 0x00
+ }
+ Case (0x11)
+ {
+ \_SB.PCI0.LPCB.TPLC = 0x00
+ }
+ Case (0x22)
+ {
+ \_SB.PCI0.LPCB.TPLC = 0x01
+ }
+ }
+
\_SB.PCI0.LPCB.FLKC =
\_SB.PCI0.LPCB.EC.ECRD (RefOf (\_SB.PCI0.LPCB.EC.FLKE))
\_SB.PCI0.LPCB.KLSC =