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authorAngel Pons <th3fanbus@gmail.com>2020-10-01 20:23:18 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-10-13 21:10:13 +0000
commit63c0dc9dba17973ad7a39895919929e118242b3b (patch)
treed44327a69961aaa73e78ce77403e74ae26adb591 /src/ec/smsc/mec1308
parente31506cd51a29f77c34e2e524801b2d0db1a5798 (diff)
nb/intel/sandybridge: Improve cbmem_top_chipset calculation
Lock bit in TSEGMB register wasn't accounted for in `cbmem_top_chipset`. Align down TSEG base to 1 MiB granularity to avoid surprises. Change-Id: I74882db99502ae77c94d43d850533a4f76da2773 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45923 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/ec/smsc/mec1308')
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