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authorHung-Te Lin <hungte@chromium.org>2013-07-03 19:07:21 +0800
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-12-12 22:05:52 +0100
commitf6d6e62aaf76ba4bef5e0dcdfc73975c25f5337b (patch)
treeda8e75305c57668ab8496b20f17de53dbc0f7ce4 /src/ec/lenovo
parent865912cec083afba64f9ada0a438da8a10daea78 (diff)
exynos5420: Setup clocks for MMC bus controller.
To configure source clocks on Exynos 5420 for MMC drivers. Some registers are different from the 5250. FSYS now has two parts and MMC uses FSYS2. The MMC block uses MPLL as the clock source. The "high-speed" MMC interface runs as 52MHz, so divider is set accordingly. Also, the MMC driver has changed from MSHCI (Mobile Storage Host Controller Interface) to DWMCI (DesignWare MMC Controller Interface). Change-Id: I9ba9cf43e2f2dcd9da747888c0c7676bd545177b Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/60858 Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/4354 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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