diff options
author | Vladimir Serbinenko <phcoder@gmail.com> | 2014-07-29 00:51:31 +0200 |
---|---|---|
committer | Vladimir Serbinenko <phcoder@gmail.com> | 2014-07-29 01:24:28 +0200 |
commit | e0ceac3856cb065e596843c7ff9975274109f5cc (patch) | |
tree | 84506be95bb928442df1a3444e62c152a6f6669c /src/ec/lenovo/h8/acpi/thermal.asl | |
parent | 5aa28f5c1b966a10d90700a285a3173ce2579047 (diff) |
ec/lenovo/h8: Apply ME workaround on X230 on S3 resume.
This makes S3 work.
Change-Id: Ife14372f5f9bb151d7e6e98c6069eb99d5369baf
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/6392
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/ec/lenovo/h8/acpi/thermal.asl')
-rw-r--r-- | src/ec/lenovo/h8/acpi/thermal.asl | 18 |
1 files changed, 13 insertions, 5 deletions
diff --git a/src/ec/lenovo/h8/acpi/thermal.asl b/src/ec/lenovo/h8/acpi/thermal.asl index 83d66c6592..fce079897c 100644 --- a/src/ec/lenovo/h8/acpi/thermal.asl +++ b/src/ec/lenovo/h8/acpi/thermal.asl @@ -1,7 +1,8 @@ Scope(\_TZ) { -#if defined (CONFIG_BOARD_LENOVO_X201) && CONFIG_BOARD_LENOVO_X201 - Name (MEBT, 0) +#if defined (EC_LENOVO_H8_ME_WORKAROUND) + Name (MEB1, 0) + Name (MEB2, 0) #endif Method(C2K, 1, NotSerialized) @@ -24,12 +25,12 @@ Scope(\_TZ) Return (C2K(127)) } Method(_TMP) { -#if defined (CONFIG_BOARD_LENOVO_X201) && CONFIG_BOARD_LENOVO_X201 +#if defined (EC_LENOVO_H8_ME_WORKAROUND) /* Avoid tripping alarm if ME isn't booted at all yet */ - If (LAnd (LNot (MEBT), LEqual (\_SB.PCI0.LPCB.EC.TMP0, 128))) { + If (LAnd (LNot (MEB1), LEqual (\_SB.PCI0.LPCB.EC.TMP0, 128))) { Return (C2K(40)) } - Store (1, MEBT) + Store (1, MEB1) #endif Return (C2K(\_SB.PCI0.LPCB.EC.TMP0)) } @@ -46,6 +47,13 @@ Scope(\_TZ) } Method(_TMP) { +#if defined (EC_LENOVO_H8_ME_WORKAROUND) + /* Avoid tripping alarm if ME isn't booted at all yet */ + If (LAnd (LNot (MEB2), LEqual (\_SB.PCI0.LPCB.EC.TMP1, 128))) { + Return (C2K(40)) + } + Store (1, MEB2) +#endif Return (C2K(\_SB.PCI0.LPCB.EC.TMP1)) } } |