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authorPaul Fagerburg <pfagerburg@chromium.org>2019-04-26 13:29:29 -0600
committerFurquan Shaikh <furquan@google.com>2019-04-29 03:45:53 +0000
commitcb42f4d467846f4b7e0b1dd5ce5f32c4c33e2ff9 (patch)
treef33a9effb06662077b6ed6a5f7952a0d7a9b5e1b /src/ec/kontron/kempld
parente54c15aa729d2b9ae2978e1aedf4fd7bc92cf97d (diff)
soc/intel/cannonlake: Modify dq_map to provide for 6 entries
Intel's DQ_DQS_RComp_Info_Utility generates data for 6 entries. MRC will return errors if we don't have all 6 entries in the map. BRANCH=none BUG=b:131103736 TEST=ensure the firmware builds without error; I don't have hardware available to test this just yet. Change-Id: I20a768de0e4440d7dde7b717794c4e2d0c62819c Signed-off-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32475 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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