diff options
author | Iru Cai <mytbk920423@gmail.com> | 2017-03-26 10:25:00 +0800 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2017-08-11 16:10:52 +0000 |
commit | 44d399c394f0cd5d38dffe551742badc100573d3 (patch) | |
tree | 23084902b39de3b72963bfc8bf8d24ebce979951 /src/ec/hp/kbc1126/early_init.c | |
parent | ae1548621acae99b7f7ac4a722607af0a4a0c825 (diff) |
ec: add support for KBC1126 in HP laptops
- let the coreboot build system insert the two blobs to the coreboot image
- EC and Super I/O initialization
- ACPI support
Tested on 2760p, 8460p, 2570p, 8470p.
Issue:
Kernel gives the following error:
ACPI Error: No handler for Region [ECRM] (...) [EmbeddedControl]
ACPI Error: Region EmbeddedControl (ID=3) has no handler
TODO:
- consider moving the Super I/O initialization code to ramstage, or
reuse the existing sio/smsc/kbc1100 code (if so, how to add the
additional kbc1126 specific functions to sio/kbc1100)
- sort out the ACPI code which is mostly from the ACPI dump of vendor
firmware
- find out why the digitizer in hp/2760p doesn't work
- GRUB payload freezing on all HP Elitebooks may be related to EC
Change-Id: I6b16eb7e26303eda740f52d667dedb7cc04b4ef0
Signed-off-by: Iru Cai <mytbk920423@gmail.com>
Reviewed-on: https://review.coreboot.org/19072
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/ec/hp/kbc1126/early_init.c')
-rw-r--r-- | src/ec/hp/kbc1126/early_init.c | 108 |
1 files changed, 108 insertions, 0 deletions
diff --git a/src/ec/hp/kbc1126/early_init.c b/src/ec/hp/kbc1126/early_init.c new file mode 100644 index 0000000000..2a74a93a1a --- /dev/null +++ b/src/ec/hp/kbc1126/early_init.c @@ -0,0 +1,108 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011 Iru Cai <mytbk920423@gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <arch/io.h> +#include <device/pnp.h> +#include "ec.h" + +void kbc1126_enter_conf(void) +{ + outb(0x55, 0x2e); + outb(0x22, 0x2e); + outb(0x00, 0x2f); + outb(0x23, 0x2e); + outb(0x00, 0x2f); + outb(0x24, 0x2e); + outb(0x84, 0x2f); +} + +void kbc1126_exit_conf(void) +{ + outb(0xaa, 0x2e); + /* one more time in PlatformStage1 of vendor firmware */ + outb(0xaa, 0x2e); + + outb(0x83, 0x200); + outb(0x00, 0x201); + inb(0x201); +} + +void kbc1126_mailbox_init(void) +{ + pnp_devfn_t dev = PNP_DEV(0x2e, KBC1100_MAILBOX); + pnp_set_logical_device(dev); + pnp_set_iobase(dev, PNP_IDX_IO0, 0x200); + pnp_set_enable(dev, 1); +} + +void kbc1126_kbc_init(void) +{ + pnp_devfn_t dev = PNP_DEV(0x2e, KBC1100_KBC); + pnp_set_logical_device(dev); + pnp_set_irq(dev, PNP_IDX_IRQ0, 0x1); + pnp_set_irq(dev, PNP_IDX_IRQ1, 0xc); + pnp_set_enable(dev, 1); +} + +void kbc1126_ec_init(void) +{ + pnp_devfn_t dev = PNP_DEV(0x2e, KBC1100_EC0); + pnp_set_logical_device(dev); + pnp_set_iobase(dev, PNP_IDX_IO0, 0x62); + pnp_set_enable(dev, 1); +} + +void kbc1126_com1_init(void) +{ + pnp_devfn_t dev = PNP_DEV(0x2e, SMSCSUPERIO_SP1); + pnp_set_logical_device(dev); + pnp_set_iobase(dev, PNP_IDX_IO0, 0x280); + pnp_set_irq(dev, PNP_IDX_IRQ0, 0x6); + pnp_set_enable(dev, 1); +} + +void kbc1126_pm1_init(void) +{ + pnp_devfn_t dev = PNP_DEV(0x2e, KBC1100_PM1); + pnp_set_logical_device(dev); + pnp_set_iobase(dev, PNP_IDX_IO0, 0x220); + pnp_set_enable(dev, 1); +} + +/* + * This code is found in PEI module F65354B9-1FF0-46D7-A5F7-0926CB238048 + * of the OEM firmware. + * + * For mainboards without a Super I/O at 0x4e, without this code, superiotool + * will detect an Infineon Super I/O at 0x4e. + */ + +void kbc1126_disable4e(void) +{ + outb(0x55, 0x4e); + + outb(0x26, 0x4e); + outb(0x00, 0x4f); + outb(0x27, 0x4e); + outb(0xfe, 0x4f); + outb(0x60, 0x4e); + outb(0xfe, 0x4f); + outb(0x61, 0x4e); + outb(0x80, 0x4f); + outb(0x30, 0x4e); + outb(0x01, 0x4f); + + outb(0xaa, 0x4e); +} |