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authorLijian Zhao <lijian.zhao@intel.com>2017-07-11 12:33:22 -0700
committerAaron Durbin <adurbin@chromium.org>2017-08-15 20:21:22 +0000
commit8465a81e81dfb2ed1fc24b9cf053b09d86fa5163 (patch)
treeff6a331f40c5887ee583359adb4a643905fc1e45 /src/ec/hp/kbc1126/Kconfig
parente2ef3cf8e3ba130fe7388c905fc06aa3ff8b0506 (diff)
soc/intel/cannonlake: Add postcar stage support
Initialize postcar frame once finish FSP memoryinit This patch was merged too early and reverted. Originally reviewed on https://review.coreboot.org/#/c/20534 Change-Id: Id36aa44bb7a89303bc22e92e0313cf685351690a Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Reviewed-on: https://review.coreboot.org/20688 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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