diff options
author | Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> | 2022-06-08 17:43:36 +0530 |
---|---|---|
committer | Martin L Roth <gaumless@gmail.com> | 2022-09-04 16:48:07 +0000 |
commit | 672bd9bee5c0045694ef20fe3e2f7a003bef0edd (patch) | |
tree | 76d53e8e0e9012d5ccc35dec28316f747fe9d7a8 /src/ec/google | |
parent | e95da5fdc036def8c230cf10ed8702008afea05f (diff) |
drivers/intel/dptf: Add multiple fan support under dptf
Add multiple fan support for dptf policies
BUG=b:235254828
BRANCH=None
TEST=Built and tested on Redrix system for two fans
Change-Id: I96ead90e3b805bd20de03e4bef4fa4b9fbaaaedd
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65611
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/ec/google')
-rw-r--r-- | src/ec/google/chromeec/acpi/emem.asl | 1 | ||||
-rw-r--r-- | src/ec/google/chromeec/chip.h | 1 | ||||
-rw-r--r-- | src/ec/google/chromeec/ec_acpi.c | 2 | ||||
-rw-r--r-- | src/ec/google/chromeec/ec_dptf_helpers.c | 35 | ||||
-rw-r--r-- | src/ec/google/common/dptf.h | 2 |
5 files changed, 32 insertions, 9 deletions
diff --git a/src/ec/google/chromeec/acpi/emem.asl b/src/ec/google/chromeec/acpi/emem.asl index 3f9a457e18..59395f3bc5 100644 --- a/src/ec/google/chromeec/acpi/emem.asl +++ b/src/ec/google/chromeec/acpi/emem.asl @@ -16,6 +16,7 @@ TIN8, 8, // Temperature 8 TIN9, 8, // Temperature 9 Offset (0x10), FAN0, 16, // Fan Speed 0 +FAN1, 16, // Fan Speed 1 Offset (0x24), BTVR, 8, // Battery structure version Offset (0x30), diff --git a/src/ec/google/chromeec/chip.h b/src/ec/google/chromeec/chip.h index bb03e5731d..77851d1d3d 100644 --- a/src/ec/google/chromeec/chip.h +++ b/src/ec/google/chromeec/chip.h @@ -12,6 +12,7 @@ struct ec_google_chromeec_config { /* Pointer to PMC Mux connector for each Type-C port */ DEVTREE_CONST struct device *mux_conn[MAX_TYPEC_PORTS]; DEVTREE_CONST struct device *retimer_conn[MAX_TYPEC_PORTS]; + bool ec_multifan_support; }; #endif /* EC_GOOGLE_CHROMEEC_CHIP_H */ diff --git a/src/ec/google/chromeec/ec_acpi.c b/src/ec/google/chromeec/ec_acpi.c index 69b10784b3..2f69d041bc 100644 --- a/src/ec/google/chromeec/ec_acpi.c +++ b/src/ec/google/chromeec/ec_acpi.c @@ -276,7 +276,7 @@ void google_chromeec_fill_ssdt_generator(const struct device *dev) ec->ops = &ec_ops; if (CONFIG(DRIVERS_INTEL_DPTF)) - ec_fill_dptf_helpers(ec); + ec_fill_dptf_helpers(ec, dev); fill_ssdt_typec_device(dev); fill_ssdt_ps2_keyboard(dev); diff --git a/src/ec/google/chromeec/ec_dptf_helpers.c b/src/ec/google/chromeec/ec_dptf_helpers.c index 1238bcfbec..c44138f587 100644 --- a/src/ec/google/chromeec/ec_dptf_helpers.c +++ b/src/ec/google/chromeec/ec_dptf_helpers.c @@ -3,7 +3,9 @@ #include <acpi/acpigen.h> #include <acpi/acpigen_dptf.h> #include <ec/google/common/dptf.h> +#include <drivers/intel/dptf/chip.h> +#include "chip.h" /* * The Chrome EC is typically in charge of many system functions, including battery charging and * fan PWM control. This places it in the middle of a DPTF implementation and therefore, many of @@ -22,6 +24,19 @@ enum { EC_FAN_DUTY_AUTO = 0xFF, }; +/* Return the fan number as a string for the FAN participant */ +static const char *fan_num_namestring_of(enum dptf_participant participant) +{ + switch (participant) { + case DPTF_FAN: + return "FAN0"; + case DPTF_FAN_2: + return "FAN1"; + default: + return ""; + } +} + static void write_charger_PPPC(const struct device *ec) { acpigen_write_method_serialized("PPPC", 0); @@ -91,7 +106,7 @@ static void write_charger_SPPC(const struct device *ec) acpigen_pop_len(); /* Method */ } -static void write_fan_fst(const struct device *ec) +static void write_fan_fst(const struct device *ec, int participant) { /* TFST is a package that is used to store data from FAND */ acpigen_write_name("TFST"); @@ -110,7 +125,7 @@ static void write_fan_fst(const struct device *ec) acpigen_write_integer(1); acpigen_emit_byte(ZERO_OP); /* 3rd arg to Index */ acpigen_write_store(); - acpigen_emit_namestring(acpi_device_path_join(ec, "FAN0")); + acpigen_emit_namestring(acpi_device_path_join(ec, fan_num_namestring_of(participant))); acpigen_emit_byte(INDEX_OP); acpigen_emit_namestring("TFST"); acpigen_write_integer(2); @@ -300,11 +315,11 @@ static void write_charger_methods(const struct device *ec) acpigen_pop_len(); /* Scope */ } -static void write_fan_methods(const struct device *ec) +static void write_fan_methods(const struct device *ec, int participant) { - dptf_write_scope(DPTF_FAN); + dptf_write_scope(participant); write_fan_fsl(ec); - write_fan_fst(ec); + write_fan_fst(ec, participant); acpigen_pop_len(); /* Scope */ } @@ -352,14 +367,20 @@ static void write_thermal_methods(const struct device *ec, enum dptf_participant acpigen_pop_len(); /* Scope */ } -void ec_fill_dptf_helpers(const struct device *ec) +void ec_fill_dptf_helpers(const struct device *ec, const struct device *fan_dev) { enum dptf_participant p; int i; + struct ec_google_chromeec_config *config = fan_dev->chip_info; write_dppm_methods(ec); write_charger_methods(ec); - write_fan_methods(ec); + + if (config->ec_multifan_support) { + for (p = DPTF_FAN; p <= DPTF_FAN_2; ++p) + write_fan_methods(ec, p); + } else + write_fan_methods(ec, DPTF_FAN); for (p = DPTF_TEMP_SENSOR_0, i = 0; p <= DPTF_TEMP_SENSOR_4; ++p, ++i) write_thermal_methods(ec, p, i); diff --git a/src/ec/google/common/dptf.h b/src/ec/google/common/dptf.h index a59ee0b6bb..b752a83549 100644 --- a/src/ec/google/common/dptf.h +++ b/src/ec/google/common/dptf.h @@ -6,6 +6,6 @@ #include <device/device.h> /* Called by google_chromeec_fill_ssdt_generator */ -void ec_fill_dptf_helpers(const struct device *dev); +void ec_fill_dptf_helpers(const struct device *dev, const struct device *fan_dev); #endif /* EC_GOOGLE_COMMON_DPTF_H */ |