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author | Ryan Chuang <ryan.chuang@mediatek.corp-partner.google.com> | 2021-07-06 17:14:29 +0800 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2021-07-07 14:49:34 +0000 |
commit | 54a2a0ad45177e1d09cc007fe3db2f6b41a4924c (patch) | |
tree | 9e623d2c30215959e2fb47313065e13cf7cac65b /src/ec/google | |
parent | c6ed254835a731625cb2a7d0c7b91e98f518a3d6 (diff) |
vc/mediatek/mt8195: Enable VREF calibration at DDR3200 for S0 stability
Signed-off-by: Ryan Chuang <ryan.chuang@mediatek.corp-partner.google.com>
Change-Id: I9df776b393f6b6166d1d6f02d5e96bd7ebc4a707
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56105
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/ec/google')
0 files changed, 0 insertions, 0 deletions