diff options
| author | Duncan Laurie <dlaurie@google.com> | 2019-01-25 10:28:03 -0800 |
|---|---|---|
| committer | Duncan Laurie <dlaurie@chromium.org> | 2019-02-04 19:20:40 +0000 |
| commit | 286a0ab143722a53f359e78e6df195b65105f87b (patch) | |
| tree | d2b04fc8e0e61a013e14f291bdfc3da665d459bf /src/ec/google/wilco/acpi/ec_ram.asl | |
| parent | 5b230027991cab928dfaee39c2b47daf4d89f5a6 (diff) | |
ec/google/wilco: Add S0ix support handlers
1) In the EC _REG method set the flag indicating S0ix support in the OS.
2) Add a function that can be called by the LPI _DSM method to indicate
to the EC that the OS is entering or exiting S0ix.
BUG=b:73137291
Change-Id: Iddc33a08542a6657694c47a9fda1b02dd39d89f7
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://review.coreboot.org/c/31094
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Shaunak Saha <shaunak.saha@intel.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/ec/google/wilco/acpi/ec_ram.asl')
| -rw-r--r-- | src/ec/google/wilco/acpi/ec_ram.asl | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/ec/google/wilco/acpi/ec_ram.asl b/src/ec/google/wilco/acpi/ec_ram.asl index 1563a3c8af..1e5d7cb1fc 100644 --- a/src/ec/google/wilco/acpi/ec_ram.asl +++ b/src/ec/google/wilco/acpi/ec_ram.asl @@ -142,3 +142,5 @@ Name (DWTL, Package () { 0x35, 0xff, WR }) /* DPTF: Write Trip Low */ Name (DWTH, Package () { 0x36, 0xff, WR }) /* DPTF: Write Trip High */ Name (DWHY, Package () { 0x37, 0xff, WR }) /* DPTF: Write Hysteresis */ Name (DWTQ, Package () { 0x38, 0xff, WR }) /* DPTF: Write Trip Query */ +Name (CSOS, Package () { 0xb8, 0xff, WR }) /* OS support for S0ix */ +Name (CSEX, Package () { 0xb9, 0xff, WR }) /* OS enter(1)/exit(0) S0ix */ |