diff options
author | Martin Roth <martinroth@google.com> | 2017-06-24 14:09:38 -0600 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2017-06-28 17:49:22 +0000 |
commit | f5c3518f0eaa3896efa684293aac69b4893ff7ae (patch) | |
tree | 02891cee1f52c105fe4100eecc3c47a696abb153 /src/ec/google/chromeec | |
parent | b3b114c28f6e7c11b327fce84d93141498d5f665 (diff) |
src/ec: add IS_ENABLED() around Kconfig symbol references
Change-Id: Ic2cdfa08cdae9f698eb2f8fa4c4ae061f1a7d903
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20340
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Diffstat (limited to 'src/ec/google/chromeec')
-rw-r--r-- | src/ec/google/chromeec/acpi/ec.asl | 2 | ||||
-rw-r--r-- | src/ec/google/chromeec/ec.c | 2 | ||||
-rw-r--r-- | src/ec/google/chromeec/ec_lpc.c | 8 |
3 files changed, 6 insertions, 6 deletions
diff --git a/src/ec/google/chromeec/acpi/ec.asl b/src/ec/google/chromeec/acpi/ec.asl index 43520f7545..a5324920e6 100644 --- a/src/ec/google/chromeec/acpi/ec.asl +++ b/src/ec/google/chromeec/acpi/ec.asl @@ -56,7 +56,7 @@ Device (EC0) TBMD, 1, // Tablet mode } -#if CONFIG_EC_GOOGLE_CHROMEEC_ACPI_MEMMAP +#if IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC_ACPI_MEMMAP) OperationRegion (EMEM, EmbeddedControl, EC_ACPI_MEM_MAPPED_BEGIN, EC_ACPI_MEM_MAPPED_SIZE) Field (EMEM, ByteAcc, Lock, Preserve) diff --git a/src/ec/google/chromeec/ec.c b/src/ec/google/chromeec/ec.c index e62241003d..de17495ff6 100644 --- a/src/ec/google/chromeec/ec.c +++ b/src/ec/google/chromeec/ec.c @@ -466,7 +466,7 @@ u32 google_chromeec_get_wake_mask(void) void google_chromeec_log_events(u32 mask) { -#if CONFIG_ELOG +#if IS_ENABLED(CONFIG_ELOG) u8 event; u32 wake_mask; diff --git a/src/ec/google/chromeec/ec_lpc.c b/src/ec/google/chromeec/ec_lpc.c index 9ead8c8f63..42a18e4a0e 100644 --- a/src/ec/google/chromeec/ec_lpc.c +++ b/src/ec/google/chromeec/ec_lpc.c @@ -38,7 +38,7 @@ static void read_bytes(u16 port, unsigned int length, u8 *dest, u8 *csum) { int i; -#if CONFIG_EC_GOOGLE_CHROMEEC_MEC +#if IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC_MEC) /* Access desired range though EMI interface */ if (port >= MEC_EMI_RANGE_START && port <= MEC_EMI_RANGE_END) { mec_io_bytes(0, port, length, dest, csum); @@ -73,7 +73,7 @@ static void write_bytes(u16 port, unsigned int length, u8 *msg, u8 *csum) { int i; -#if CONFIG_EC_GOOGLE_CHROMEEC_MEC +#if IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC_MEC) /* Access desired range though EMI interface */ if (port >= MEC_EMI_RANGE_START && port <= MEC_EMI_RANGE_END) { mec_io_bytes(1, port, length, msg, csum); @@ -124,7 +124,7 @@ static int google_chromeec_wait_ready(u16 port) EC_LPC_CMDR_BUSY, 0); } -#if CONFIG_EC_GOOGLE_CHROMEEC_ACPI_MEMMAP +#if IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC_ACPI_MEMMAP) /* Read memmap data through ACPI port 66/62 */ static int read_memmap(u8 *data, u8 offset) { @@ -158,7 +158,7 @@ static int google_chromeec_command_version(void) { u8 id1, id2, flags; -#if CONFIG_EC_GOOGLE_CHROMEEC_ACPI_MEMMAP +#if IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC_ACPI_MEMMAP) if (read_memmap(&id1, EC_MEMMAP_ID) || read_memmap(&id2, EC_MEMMAP_ID + 1) || read_memmap(&flags, EC_MEMMAP_HOST_CMD_FLAGS)) { |